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[X86] Change some compare patterns to use loadi8/loadi16/loadi32/loadi64 helper fragments. 

This enables CMP8mi to fold zextloadi8i1 which in all tests allows us to avoid creating a TEST8rr that peephole can't fold.

llvm-svn: 324863
This commit is contained in:
Craig Topper 2018-02-12 02:48:42 +00:00
parent 27d5b6e4a6
commit 98ae8f833f
4 changed files with 14 additions and 14 deletions
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9
llvm/lib/Target/X86/X86InstrArithmetic.td
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@ -850,7 +850,8 @@ class BinOpMR_RMW_FF<bits<8> opcode, string mnemonic, X86TypeInfo typeinfo,
class BinOpMR_F<bits<8> opcode, string mnemonic, X86TypeInfo typeinfo,
SDPatternOperator opnode>
: BinOpMR<opcode, mnemonic, typeinfo,
[(set EFLAGS, (opnode (load addr:$dst), typeinfo.RegClass:$src))]>;
[(set EFLAGS, (opnode (typeinfo.LoadNode addr:$dst),
typeinfo.RegClass:$src))]>;
// BinOpMI - Instructions like "add [mem], imm".
class BinOpMI<bits<8> opcode, string mnemonic, X86TypeInfo typeinfo,
@ -882,8 +883,8 @@ class BinOpMI_RMW_FF<bits<8> opcode, string mnemonic, X86TypeInfo typeinfo,
class BinOpMI_F<bits<8> opcode, string mnemonic, X86TypeInfo typeinfo,
SDPatternOperator opnode, Format f>
: BinOpMI<opcode, mnemonic, typeinfo, f,
[(set EFLAGS, (opnode (typeinfo.VT (load addr:$dst)),
typeinfo.ImmOperator:$src))]>;
[(set EFLAGS, (opnode (typeinfo.LoadNode addr:$dst),
typeinfo.ImmOperator:$src))]>;
// BinOpMI8 - Instructions like "add [mem], imm8".
class BinOpMI8<string mnemonic, X86TypeInfo typeinfo,
@ -916,7 +917,7 @@ class BinOpMI8_RMW_FF<string mnemonic, X86TypeInfo typeinfo,
class BinOpMI8_F<string mnemonic, X86TypeInfo typeinfo,
SDPatternOperator opnode, Format f>
: BinOpMI8<mnemonic, typeinfo, f,
[(set EFLAGS, (opnode (load addr:$dst),
[(set EFLAGS, (opnode (typeinfo.LoadNode addr:$dst),
typeinfo.Imm8Operator:$src))]>;
// BinOpAI - Instructions like "add %eax, %eax, imm", that imp-def EFLAGS.

3
llvm/test/CodeGen/X86/avx512-insert-extract.ll
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@ -285,9 +285,8 @@ define i64 @test14(<8 x i64>%a, <8 x i64>%b, i64 %a1, i64 %b1) {
define i16 @test15(i1 *%addr) {
; CHECK-LABEL: test15:
; CHECK: ## %bb.0:
; CHECK-NEXT: movb (%rdi), %al
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: cmpb $0, (%rdi)
; CHECK-NEXT: movw $-1, %ax
; CHECK-NEXT: cmovew %cx, %ax
; CHECK-NEXT: retq

11
llvm/test/CodeGen/X86/i386-shrink-wrapping.ll
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@ -40,11 +40,12 @@ target triple = "i386-apple-macosx10.5"
; The for.end block is split to accomadate the different selects.
; We are interested in the one with the call, so skip until the branch.
; CHECK: [[FOREND_LABEL]]:
; CHECK-NEXT: movb _d, [[D:%[a-z]+]]
; [...]
; CHECK: jne [[CALL_LABEL:LBB[0-9_]+]]
; CHECK-NEXT: xorl
; CHECK-NEXT: cmpb $0, _d
; CHECK-NEXT: movl $0, %edx
; CHECK-NEXT: jne [[CALL_LABEL:LBB[0-9_]+]]
;
; CHECK: movb $6, [[D]]
; CHECK: movb $6, %dl
;
; CHECK: [[CALL_LABEL]]
;
@ -54,7 +55,7 @@ target triple = "i386-apple-macosx10.5"
; ENABLE-NEXT: leal -20(%esp), %esp
;
; CHECK-NEXT: L_e$non_lazy_ptr, [[E:%[a-z]+]]
; CHECK-NEXT: movb [[D]], ([[E]])
; CHECK-NEXT: movb %dl, ([[E]])
; CHECK-NEXT: movsbl ([[E]]), [[CONV:%[a-z]+]]
; CHECK-NEXT: movl $6, [[CONV:%[a-z]+]]
; The eflags is used in the next instruction.

5
llvm/test/CodeGen/X86/x86-shrink-wrapping.ll
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@ -808,10 +808,9 @@ end:
; DISABLE-NEXT: subq $16, %rsp
;
; Load the value of b.
; CHECK: movb _b(%rip), [[BOOL:%cl]]
; Create the zero value for the select assignment.
; CHECK-NEXT: xorl [[CMOVE_VAL:%eax]], [[CMOVE_VAL]]
; CHECK-NEXT: testb [[BOOL]], [[BOOL]]
; CHECK: xorl [[CMOVE_VAL:%eax]], [[CMOVE_VAL]]
; CHECK-NEXT: cmpb $0, _b(%rip)
; CHECK-NEXT: jne [[STOREC_LABEL:LBB[0-9_]+]]
;
; CHECK: movb $48, [[CMOVE_VAL:%al]]