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Allow for 'fcmp ogt' in SPU. 

Fix by Visa Putkinen!

llvm-svn: 120090
This commit is contained in:
Kalle Raiskila 2010-11-24 11:42:17 +00:00
parent 2a80a9e3d3
commit 97fc68774c
2 changed files with 21 additions and 8 deletions
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4
llvm/lib/Target/CellSPU/SPUInstrInfo.td
View File

@ -3903,7 +3903,7 @@ def FCGTf32 :
"fcgt\t$rT, $rA, $rB", SPrecFP,
[(set R32C:$rT, (setugt R32FP:$rA, R32FP:$rB))]>;
def : Pat<(setugt R32FP:$rA, R32FP:$rB),
def : Pat<(setogt R32FP:$rA, R32FP:$rB),
(FCGTf32 R32FP:$rA, R32FP:$rB)>;
def FCMGTf32 :
@ -3911,7 +3911,7 @@ def FCMGTf32 :
"fcmgt\t$rT, $rA, $rB", SPrecFP,
[(set R32C:$rT, (setugt (fabs R32FP:$rA), (fabs R32FP:$rB)))]>;
def : Pat<(setugt (fabs R32FP:$rA), (fabs R32FP:$rB)),
def : Pat<(setogt (fabs R32FP:$rA), (fabs R32FP:$rB)),
(FCMGTf32 R32FP:$rA, R32FP:$rB)>;
//--------------------------------------------------------------------------

25
llvm/test/CodeGen/CellSPU/fcmp32.ll
View File

@ -1,9 +1,4 @@
; RUN: llc < %s -march=cellspu > %t1.s
; RUN: grep fceq %t1.s | count 1
; RUN: grep fcmeq %t1.s | count 1
target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
target triple = "spu"
; RUN: llc --march=cellspu %s -o - | FileCheck %s
; Exercise the floating point comparison operators for f32:
@ -11,13 +6,31 @@ declare double @fabs(double)
declare float @fabsf(float)
define i1 @fcmp_eq(float %arg1, float %arg2) {
; CHECK: fceq
; CHECK: bi $lr
%A = fcmp oeq float %arg1, %arg2
ret i1 %A
}
define i1 @fcmp_mag_eq(float %arg1, float %arg2) {
; CHECK: fcmeq
; CHECK: bi $lr
%1 = call float @fabsf(float %arg1)
%2 = call float @fabsf(float %arg2)
%3 = fcmp oeq float %1, %2
ret i1 %3
}
define i1 @test_ogt(float %a, float %b) {
; CHECK: fcgt
; CHECK: bi $lr
%cmp = fcmp ogt float %a, %b
ret i1 %cmp
}
define i1 @test_ugt(float %a, float %b) {
; CHECK: fcgt
; CHECK: bi $lr
%cmp = fcmp ugt float %a, %b
ret i1 %cmp
}