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Mark non-VEX forms of PCLMUL instructions as requiring SSE2 to be enabled along with CLMUL. That's required for the XMM registers to be valid for integer data. Doesn't change any behavior since the CLMUL instructions don't have patterns yet. 

llvm-svn: 147345
This commit is contained in:
Craig Topper 2011-12-29 18:08:36 +00:00
parent 1559123c77
commit 97f05c5768
1 changed files with 1 additions and 1 deletions
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llvm/lib/Target/X86/X86InstrFormats.td
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@ -494,7 +494,7 @@ class AESAI<bits<8> o, Format F, dag outs, dag ins, string asm,
class CLMULIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
list<dag>pattern>
: Ii8<o, F, outs, ins, asm, pattern, SSEPackedInt>, TA,
OpSize, Requires<[HasCLMUL]>;
OpSize, Requires<[HasSSE2, HasCLMUL]>;
class AVXCLMULIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
list<dag>pattern>