Use xorl instead of xorq to enter a zero into a 64-bit register.
llvm-svn: 42027
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@ -1018,13 +1018,15 @@ def PsMOVZX64rm32: I<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i32mem:$src),
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[(set GR64:$dst, (zextloadi64i32 addr:$src))]>;
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[(set GR64:$dst, (zextloadi64i32 addr:$src))]>;
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// Alias instructions that map movr0 to xor.
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// Alias instructions that map movr0 to xor. Use xorl instead of xorq; it's
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// equivalent due to implicit zero-extending, and it sometimes has a smaller
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// encoding.
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// FIXME: remove when we can teach regalloc that xor reg, reg is ok.
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// FIXME: remove when we can teach regalloc that xor reg, reg is ok.
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// FIXME: AddedComplexity gives MOV64r0 a higher priority than MOV64ri32. Remove
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// FIXME: AddedComplexity gives MOV64r0 a higher priority than MOV64ri32. Remove
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// when we have a better way to specify isel priority.
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// when we have a better way to specify isel priority.
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let Defs = [EFLAGS], AddedComplexity = 1, isReMaterializable = 1 in
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let Defs = [EFLAGS], AddedComplexity = 1, isReMaterializable = 1 in
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def MOV64r0 : RI<0x31, MRMInitReg, (outs GR64:$dst), (ins),
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def MOV64r0 : RI<0x31, MRMInitReg, (outs GR64:$dst), (ins),
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"xor{q}\t$dst, $dst",
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"xor{l}\t${dst:subreg32}, ${dst:subreg32}",
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[(set GR64:$dst, 0)]>;
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[(set GR64:$dst, 0)]>;
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// Materialize i64 constant where top 32-bits are zero.
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// Materialize i64 constant where top 32-bits are zero.
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