llvm-svn: 31364
This commit is contained in:
Evan Cheng 2006-11-01 23:18:32 +00:00
parent d8697deca3
commit 93cdd149f7
4 changed files with 7 additions and 5 deletions

View File

@ -240,9 +240,9 @@ public:
return -1;
}
/// getTiedToSrcOperand - Returns the operand that is tied to the specified
/// findTiedToSrcOperand - Returns the operand that is tied to the specified
/// dest operand. Returns -1 if there isn't one.
int getTiedToSrcOperand(MachineOpCode Opcode, unsigned OpNum) const;
int findTiedToSrcOperand(MachineOpCode Opcode, unsigned OpNum) const;
/// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
/// instruction if it has one. This is used by codegen passes that update

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@ -200,7 +200,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
if (physReg == 0) {
if (op.isDef()) {
int TiedOp = TM->getInstrInfo()
->getTiedToSrcOperand(MI->getOpcode(), i);
->findTiedToSrcOperand(MI->getOpcode(), i);
if (TiedOp == -1) {
physReg = getFreeReg(virtualReg);
} else {

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@ -821,7 +821,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
// If this def is part of a two-address operand, make sure to execute
// the store from the correct physical register.
unsigned PhysReg;
int TiedOp = TII->getTiedToSrcOperand(MI.getOpcode(), i);
int TiedOp = TII->findTiedToSrcOperand(MI.getOpcode(), i);
if (TiedOp != -1)
PhysReg = MI.getOperand(TiedOp).getReg();
else

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@ -38,8 +38,10 @@ TargetInstrInfo::~TargetInstrInfo() {
TargetInstrDescriptors = NULL; // reset global variable
}
/// findTiedToSrcOperand - Returns the operand that is tied to the specified
/// dest operand. Returns -1 if there isn't one.
int
TargetInstrInfo::getTiedToSrcOperand(MachineOpCode Opc, unsigned OpNum) const {
TargetInstrInfo::findTiedToSrcOperand(MachineOpCode Opc, unsigned OpNum) const {
for (unsigned i = 0, e = getNumOperands(Opc); i != e; ++i) {
if (i == OpNum)
continue;