[AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description.
Summary of changes: - Added f16 omod modifier (bug 51386). - Corrected names of data types (bug 48638). - Enabled a16 with most GFX10 MIMG opcodes (see https://reviews.llvm.org/D102231). - Corrected description of integer operands (bug 51130). - Corrected description of 8-bit DS offsets (bug 51536). - Improved PERMLANE op_sel description. - Corrected *SAD* opcode types.
This commit is contained in:
Dmitry Preobrazhensky
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51414d9982
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8ea3e9d9a2
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@ -38,10 +38,10 @@ DPP16
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.. parsed-literal::
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**INSTRUCTION** **DST** **SRC0** **SRC1** **MODIFIERS**
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\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
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v_dot2c_f32_f16_dpp :ref:`vdst<amdgpu_synid1011_vdst32_0>`, :ref:`vsrc0<amdgpu_synid1011_vsrc32_0>`::ref:`f16x2<amdgpu_synid1011_type_dev>`, :ref:`vsrc1<amdgpu_synid1011_vsrc32_0>`::ref:`f16x2<amdgpu_synid1011_type_dev>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
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v_dot4c_i32_i8_dpp :ref:`vdst<amdgpu_synid1011_vdst32_0>`, :ref:`vsrc0<amdgpu_synid1011_vsrc32_0>`::ref:`i8x4<amdgpu_synid1011_type_dev>`, :ref:`vsrc1<amdgpu_synid1011_vsrc32_0>`::ref:`i8x4<amdgpu_synid1011_type_dev>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
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**INSTRUCTION** **DST** **SRC0** **SRC1** **MODIFIERS**
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\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
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v_dot2c_f32_f16_dpp :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx1011_vsrc>`::ref:`f16x2<amdgpu_synid_gfx1011_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx1011_vsrc>`::ref:`f16x2<amdgpu_synid_gfx1011_type_deviation>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
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v_dot4c_i32_i8_dpp :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx1011_vsrc>`::ref:`i8x4<amdgpu_synid_gfx1011_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx1011_vsrc>`::ref:`i8x4<amdgpu_synid_gfx1011_type_deviation>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>`
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DPP8
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-----------------------
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@ -49,9 +49,9 @@ DPP8
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.. parsed-literal::
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**INSTRUCTION** **DST** **SRC0** **SRC1** **MODIFIERS**
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\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
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v_dot2c_f32_f16_dpp :ref:`vdst<amdgpu_synid1011_vdst32_0>`, :ref:`vsrc0<amdgpu_synid1011_vsrc32_0>`::ref:`f16x2<amdgpu_synid1011_type_dev>`, :ref:`vsrc1<amdgpu_synid1011_vsrc32_0>`::ref:`f16x2<amdgpu_synid1011_type_dev>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
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v_dot4c_i32_i8_dpp :ref:`vdst<amdgpu_synid1011_vdst32_0>`, :ref:`vsrc0<amdgpu_synid1011_vsrc32_0>`::ref:`i8x4<amdgpu_synid1011_type_dev>`, :ref:`vsrc1<amdgpu_synid1011_vsrc32_0>`::ref:`i8x4<amdgpu_synid1011_type_dev>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
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\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
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v_dot2c_f32_f16_dpp :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx1011_vsrc>`::ref:`f16x2<amdgpu_synid_gfx1011_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx1011_vsrc>`::ref:`f16x2<amdgpu_synid_gfx1011_type_deviation>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
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v_dot4c_i32_i8_dpp :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx1011_vsrc>`::ref:`i8x4<amdgpu_synid_gfx1011_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx1011_vsrc>`::ref:`i8x4<amdgpu_synid_gfx1011_type_deviation>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>`
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VOP2
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-----------------------
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@ -59,9 +59,9 @@ VOP2
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.. parsed-literal::
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**INSTRUCTION** **DST** **SRC0** **SRC1**
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\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
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v_dot2c_f32_f16 :ref:`vdst<amdgpu_synid1011_vdst32_0>`, :ref:`src0<amdgpu_synid1011_src32_0>`::ref:`f16x2<amdgpu_synid1011_type_dev>`, :ref:`vsrc1<amdgpu_synid1011_vsrc32_0>`::ref:`f16x2<amdgpu_synid1011_type_dev>`
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v_dot4c_i32_i8 :ref:`vdst<amdgpu_synid1011_vdst32_0>`, :ref:`src0<amdgpu_synid1011_src32_0>`::ref:`i8x4<amdgpu_synid1011_type_dev>`, :ref:`vsrc1<amdgpu_synid1011_vsrc32_0>`::ref:`i8x4<amdgpu_synid1011_type_dev>`
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\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
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v_dot2c_f32_f16 :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src>`::ref:`f16x2<amdgpu_synid_gfx1011_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx1011_vsrc>`::ref:`f16x2<amdgpu_synid_gfx1011_type_deviation>`
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v_dot4c_i32_i8 :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src>`::ref:`i8x4<amdgpu_synid_gfx1011_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx1011_vsrc>`::ref:`i8x4<amdgpu_synid_gfx1011_type_deviation>`
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VOP3P
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-----------------------
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@ -69,26 +69,24 @@ VOP3P
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.. parsed-literal::
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**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
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\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
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v_dot2_f32_f16 :ref:`vdst<amdgpu_synid1011_vdst32_0>`, :ref:`src0<amdgpu_synid1011_src32_0>`::ref:`f16x2<amdgpu_synid1011_type_dev>`, :ref:`src1<amdgpu_synid1011_src32_1>`::ref:`f16x2<amdgpu_synid1011_type_dev>`, :ref:`src2<amdgpu_synid1011_src32_1>`::ref:`f32<amdgpu_synid1011_type_dev>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
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v_dot2_i32_i16 :ref:`vdst<amdgpu_synid1011_vdst32_0>`, :ref:`src0<amdgpu_synid1011_src32_2>`::ref:`i16x2<amdgpu_synid1011_type_dev>`, :ref:`src1<amdgpu_synid1011_src32_3>`::ref:`i16x2<amdgpu_synid1011_type_dev>`, :ref:`src2<amdgpu_synid1011_src32_1>`::ref:`i32<amdgpu_synid1011_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
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v_dot2_u32_u16 :ref:`vdst<amdgpu_synid1011_vdst32_0>`, :ref:`src0<amdgpu_synid1011_src32_2>`::ref:`u16x2<amdgpu_synid1011_type_dev>`, :ref:`src1<amdgpu_synid1011_src32_3>`::ref:`u16x2<amdgpu_synid1011_type_dev>`, :ref:`src2<amdgpu_synid1011_src32_1>`::ref:`u32<amdgpu_synid1011_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
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v_dot4_i32_i8 :ref:`vdst<amdgpu_synid1011_vdst32_0>`, :ref:`src0<amdgpu_synid1011_src32_0>`::ref:`i8x4<amdgpu_synid1011_type_dev>`, :ref:`src1<amdgpu_synid1011_src32_1>`::ref:`i8x4<amdgpu_synid1011_type_dev>`, :ref:`src2<amdgpu_synid1011_src32_1>`::ref:`i32<amdgpu_synid1011_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
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v_dot4_u32_u8 :ref:`vdst<amdgpu_synid1011_vdst32_0>`, :ref:`src0<amdgpu_synid1011_src32_0>`::ref:`u8x4<amdgpu_synid1011_type_dev>`, :ref:`src1<amdgpu_synid1011_src32_1>`::ref:`u8x4<amdgpu_synid1011_type_dev>`, :ref:`src2<amdgpu_synid1011_src32_1>`::ref:`u32<amdgpu_synid1011_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
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v_dot8_i32_i4 :ref:`vdst<amdgpu_synid1011_vdst32_0>`, :ref:`src0<amdgpu_synid1011_src32_0>`::ref:`i4x8<amdgpu_synid1011_type_dev>`, :ref:`src1<amdgpu_synid1011_src32_1>`::ref:`i4x8<amdgpu_synid1011_type_dev>`, :ref:`src2<amdgpu_synid1011_src32_1>`::ref:`i32<amdgpu_synid1011_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
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v_dot8_u32_u4 :ref:`vdst<amdgpu_synid1011_vdst32_0>`, :ref:`src0<amdgpu_synid1011_src32_0>`::ref:`u4x8<amdgpu_synid1011_type_dev>`, :ref:`src1<amdgpu_synid1011_src32_1>`::ref:`u4x8<amdgpu_synid1011_type_dev>`, :ref:`src2<amdgpu_synid1011_src32_1>`::ref:`u32<amdgpu_synid1011_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
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\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
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v_dot2_f32_f16 :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src>`::ref:`f16x2<amdgpu_synid_gfx1011_type_deviation>`, :ref:`src1<amdgpu_synid_gfx1011_src_1>`::ref:`f16x2<amdgpu_synid_gfx1011_type_deviation>`, :ref:`src2<amdgpu_synid_gfx1011_src_1>`::ref:`f32<amdgpu_synid_gfx1011_type_deviation>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
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v_dot2_i32_i16 :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src_2>`::ref:`i16x2<amdgpu_synid_gfx1011_type_deviation>`, :ref:`src1<amdgpu_synid_gfx1011_src_3>`::ref:`i16x2<amdgpu_synid_gfx1011_type_deviation>`, :ref:`src2<amdgpu_synid_gfx1011_src_1>`::ref:`i32<amdgpu_synid_gfx1011_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
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v_dot2_u32_u16 :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src_2>`::ref:`u16x2<amdgpu_synid_gfx1011_type_deviation>`, :ref:`src1<amdgpu_synid_gfx1011_src_3>`::ref:`u16x2<amdgpu_synid_gfx1011_type_deviation>`, :ref:`src2<amdgpu_synid_gfx1011_src_1>`::ref:`u32<amdgpu_synid_gfx1011_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
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v_dot4_i32_i8 :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src>`::ref:`i8x4<amdgpu_synid_gfx1011_type_deviation>`, :ref:`src1<amdgpu_synid_gfx1011_src_1>`::ref:`i8x4<amdgpu_synid_gfx1011_type_deviation>`, :ref:`src2<amdgpu_synid_gfx1011_src_1>`::ref:`i32<amdgpu_synid_gfx1011_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
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v_dot4_u32_u8 :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src>`::ref:`u8x4<amdgpu_synid_gfx1011_type_deviation>`, :ref:`src1<amdgpu_synid_gfx1011_src_1>`::ref:`u8x4<amdgpu_synid_gfx1011_type_deviation>`, :ref:`src2<amdgpu_synid_gfx1011_src_1>`::ref:`u32<amdgpu_synid_gfx1011_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
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v_dot8_i32_i4 :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src>`::ref:`i4x8<amdgpu_synid_gfx1011_type_deviation>`, :ref:`src1<amdgpu_synid_gfx1011_src_1>`::ref:`i4x8<amdgpu_synid_gfx1011_type_deviation>`, :ref:`src2<amdgpu_synid_gfx1011_src_1>`::ref:`i32<amdgpu_synid_gfx1011_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
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v_dot8_u32_u4 :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid_gfx1011_src>`::ref:`u4x8<amdgpu_synid_gfx1011_type_deviation>`, :ref:`src1<amdgpu_synid_gfx1011_src_1>`::ref:`u4x8<amdgpu_synid_gfx1011_type_deviation>`, :ref:`src2<amdgpu_synid_gfx1011_src_1>`::ref:`u32<amdgpu_synid_gfx1011_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
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.. |---| unicode:: U+02014 .. em dash
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.. toctree::
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:hidden:
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AMDGPUAsmGFX10
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gfx1011_src32_0
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gfx1011_src32_1
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gfx1011_src32_2
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gfx1011_src32_3
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gfx1011_vdst32_0
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gfx1011_vsrc32_0
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gfx1011_type_dev
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gfx1011_src
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gfx1011_src_1
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gfx1011_src_2
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gfx1011_src_3
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gfx1011_type_deviation
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gfx1011_vdst
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gfx1011_vsrc
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@ -38,21 +38,19 @@ VOP3P
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.. parsed-literal::
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**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_mad_mix_f32 :ref:`vdst<amdgpu_synid900_vdst32_0>`, :ref:`src0<amdgpu_synid900_src32_0>`::ref:`m<amdgpu_synid900_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid900_mad_type_dev>`, :ref:`src1<amdgpu_synid900_src32_1>`::ref:`m<amdgpu_synid900_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid900_mad_type_dev>`, :ref:`src2<amdgpu_synid900_src32_1>`::ref:`m<amdgpu_synid900_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid900_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_mixhi_f16 :ref:`vdst<amdgpu_synid900_vdst32_0>`, :ref:`src0<amdgpu_synid900_src32_0>`::ref:`m<amdgpu_synid900_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid900_mad_type_dev>`, :ref:`src1<amdgpu_synid900_src32_1>`::ref:`m<amdgpu_synid900_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid900_mad_type_dev>`, :ref:`src2<amdgpu_synid900_src32_1>`::ref:`m<amdgpu_synid900_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid900_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_mixlo_f16 :ref:`vdst<amdgpu_synid900_vdst32_0>`, :ref:`src0<amdgpu_synid900_src32_0>`::ref:`m<amdgpu_synid900_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid900_mad_type_dev>`, :ref:`src1<amdgpu_synid900_src32_1>`::ref:`m<amdgpu_synid900_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid900_mad_type_dev>`, :ref:`src2<amdgpu_synid900_src32_1>`::ref:`m<amdgpu_synid900_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid900_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_mad_mix_f32 :ref:`vdst<amdgpu_synid_gfx900_vdst>`, :ref:`src0<amdgpu_synid_gfx900_src>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>`, :ref:`src1<amdgpu_synid_gfx900_src_1>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>`, :ref:`src2<amdgpu_synid_gfx900_src_1>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_mixhi_f16 :ref:`vdst<amdgpu_synid_gfx900_vdst>`, :ref:`src0<amdgpu_synid_gfx900_src>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>`, :ref:`src1<amdgpu_synid_gfx900_src_1>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>`, :ref:`src2<amdgpu_synid_gfx900_src_1>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mad_mixlo_f16 :ref:`vdst<amdgpu_synid_gfx900_vdst>`, :ref:`src0<amdgpu_synid_gfx900_src>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>`, :ref:`src1<amdgpu_synid_gfx900_src_1>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>`, :ref:`src2<amdgpu_synid_gfx900_src_1>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
|
||||
.. |---| unicode:: U+02014 .. em dash
|
||||
|
||||
|
||||
.. toctree::
|
||||
:hidden:
|
||||
|
||||
AMDGPUAsmGFX9
|
||||
gfx900_src32_0
|
||||
gfx900_src32_1
|
||||
gfx900_vdst32_0
|
||||
gfx900_mad_type_dev
|
||||
gfx900_mod_vop3_abs_neg
|
||||
gfx900_fx_operand
|
||||
gfx900_m
|
||||
gfx900_src
|
||||
gfx900_src_1
|
||||
gfx900_vdst
|
||||
|
|
|
|||
|
|
@ -38,21 +38,19 @@ VOP3P
|
|||
|
||||
.. parsed-literal::
|
||||
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_fma_mix_f32 :ref:`vdst<amdgpu_synid904_vdst32_0>`, :ref:`src0<amdgpu_synid904_src32_0>`::ref:`m<amdgpu_synid904_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid904_mad_type_dev>`, :ref:`src1<amdgpu_synid904_src32_1>`::ref:`m<amdgpu_synid904_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid904_mad_type_dev>`, :ref:`src2<amdgpu_synid904_src32_1>`::ref:`m<amdgpu_synid904_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid904_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_mixhi_f16 :ref:`vdst<amdgpu_synid904_vdst32_0>`, :ref:`src0<amdgpu_synid904_src32_0>`::ref:`m<amdgpu_synid904_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid904_mad_type_dev>`, :ref:`src1<amdgpu_synid904_src32_1>`::ref:`m<amdgpu_synid904_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid904_mad_type_dev>`, :ref:`src2<amdgpu_synid904_src32_1>`::ref:`m<amdgpu_synid904_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid904_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_mixlo_f16 :ref:`vdst<amdgpu_synid904_vdst32_0>`, :ref:`src0<amdgpu_synid904_src32_0>`::ref:`m<amdgpu_synid904_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid904_mad_type_dev>`, :ref:`src1<amdgpu_synid904_src32_1>`::ref:`m<amdgpu_synid904_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid904_mad_type_dev>`, :ref:`src2<amdgpu_synid904_src32_1>`::ref:`m<amdgpu_synid904_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid904_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_fma_mix_f32 :ref:`vdst<amdgpu_synid_gfx904_vdst>`, :ref:`src0<amdgpu_synid_gfx904_src>`::ref:`m<amdgpu_synid_gfx904_m>`::ref:`fx<amdgpu_synid_gfx904_fx_operand>`, :ref:`src1<amdgpu_synid_gfx904_src_1>`::ref:`m<amdgpu_synid_gfx904_m>`::ref:`fx<amdgpu_synid_gfx904_fx_operand>`, :ref:`src2<amdgpu_synid_gfx904_src_1>`::ref:`m<amdgpu_synid_gfx904_m>`::ref:`fx<amdgpu_synid_gfx904_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_mixhi_f16 :ref:`vdst<amdgpu_synid_gfx904_vdst>`, :ref:`src0<amdgpu_synid_gfx904_src>`::ref:`m<amdgpu_synid_gfx904_m>`::ref:`fx<amdgpu_synid_gfx904_fx_operand>`, :ref:`src1<amdgpu_synid_gfx904_src_1>`::ref:`m<amdgpu_synid_gfx904_m>`::ref:`fx<amdgpu_synid_gfx904_fx_operand>`, :ref:`src2<amdgpu_synid_gfx904_src_1>`::ref:`m<amdgpu_synid_gfx904_m>`::ref:`fx<amdgpu_synid_gfx904_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_mixlo_f16 :ref:`vdst<amdgpu_synid_gfx904_vdst>`, :ref:`src0<amdgpu_synid_gfx904_src>`::ref:`m<amdgpu_synid_gfx904_m>`::ref:`fx<amdgpu_synid_gfx904_fx_operand>`, :ref:`src1<amdgpu_synid_gfx904_src_1>`::ref:`m<amdgpu_synid_gfx904_m>`::ref:`fx<amdgpu_synid_gfx904_fx_operand>`, :ref:`src2<amdgpu_synid_gfx904_src_1>`::ref:`m<amdgpu_synid_gfx904_m>`::ref:`fx<amdgpu_synid_gfx904_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
|
||||
.. |---| unicode:: U+02014 .. em dash
|
||||
|
||||
|
||||
.. toctree::
|
||||
:hidden:
|
||||
|
||||
AMDGPUAsmGFX9
|
||||
gfx904_src32_0
|
||||
gfx904_src32_1
|
||||
gfx904_vdst32_0
|
||||
gfx904_mad_type_dev
|
||||
gfx904_mod_vop3_abs_neg
|
||||
gfx904_fx_operand
|
||||
gfx904_m
|
||||
gfx904_src
|
||||
gfx904_src_1
|
||||
gfx904_vdst
|
||||
|
|
|
|||
|
|
@ -38,13 +38,13 @@ VOP2
|
|||
|
||||
.. parsed-literal::
|
||||
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_fmac_f32 :ref:`vdst<amdgpu_synid906_vdst32_0>`, :ref:`src0<amdgpu_synid906_src32_0>`, :ref:`vsrc1<amdgpu_synid906_vsrc32_0>`
|
||||
v_fmac_f32_dpp :ref:`vdst<amdgpu_synid906_vdst32_0>`, :ref:`vsrc0<amdgpu_synid906_vsrc32_0>`::ref:`m<amdgpu_synid906_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid906_vsrc32_0>`::ref:`m<amdgpu_synid906_mod_dpp_sdwa_abs_neg>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_xnor_b32 :ref:`vdst<amdgpu_synid906_vdst32_0>`, :ref:`src0<amdgpu_synid906_src32_0>`, :ref:`vsrc1<amdgpu_synid906_vsrc32_0>`
|
||||
v_xnor_b32_dpp :ref:`vdst<amdgpu_synid906_vdst32_0>`, :ref:`vsrc0<amdgpu_synid906_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid906_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_xnor_b32_sdwa :ref:`vdst<amdgpu_synid906_vdst32_0>`, :ref:`src0<amdgpu_synid906_src32_0>`::ref:`m<amdgpu_synid906_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid906_vsrc32_0>`::ref:`m<amdgpu_synid906_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_fmac_f32 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src>`, :ref:`vsrc1<amdgpu_synid_gfx906_vsrc>`
|
||||
v_fmac_f32_dpp :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx906_vsrc>`::ref:`m<amdgpu_synid_gfx906_m>`, :ref:`vsrc1<amdgpu_synid_gfx906_vsrc>`::ref:`m<amdgpu_synid_gfx906_m>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_xnor_b32 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src>`, :ref:`vsrc1<amdgpu_synid_gfx906_vsrc>`
|
||||
v_xnor_b32_dpp :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx906_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx906_vsrc>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_xnor_b32_sdwa :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_1>`::ref:`m<amdgpu_synid_gfx906_m_1>`, :ref:`src1<amdgpu_synid_gfx906_src_1>`::ref:`m<amdgpu_synid_gfx906_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
|
||||
VOP3
|
||||
-----------------------
|
||||
|
|
@ -52,44 +52,41 @@ VOP3
|
|||
.. parsed-literal::
|
||||
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_fmac_f32_e64 :ref:`vdst<amdgpu_synid906_vdst32_0>`, :ref:`src0<amdgpu_synid906_src32_1>`::ref:`m<amdgpu_synid906_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid906_src32_2>`::ref:`m<amdgpu_synid906_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_xnor_b32_e64 :ref:`vdst<amdgpu_synid906_vdst32_0>`, :ref:`src0<amdgpu_synid906_src32_1>`, :ref:`src1<amdgpu_synid906_src32_2>`
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_fmac_f32_e64 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`m<amdgpu_synid_gfx906_m>`, :ref:`src1<amdgpu_synid_gfx906_src_1>`::ref:`m<amdgpu_synid_gfx906_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_xnor_b32_e64 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`, :ref:`src1<amdgpu_synid_gfx906_src_1>`
|
||||
|
||||
VOP3P
|
||||
-----------------------
|
||||
|
||||
.. parsed-literal::
|
||||
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_dot2_f32_f16 :ref:`vdst<amdgpu_synid906_vdst32_0>`, :ref:`src0<amdgpu_synid906_src32_1>`::ref:`f16x2<amdgpu_synid906_type_dev>`, :ref:`src1<amdgpu_synid906_src32_2>`::ref:`f16x2<amdgpu_synid906_type_dev>`, :ref:`src2<amdgpu_synid906_src32_2>`::ref:`f32<amdgpu_synid906_type_dev>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot2_i32_i16 :ref:`vdst<amdgpu_synid906_vdst32_0>`, :ref:`src0<amdgpu_synid906_src32_3>`::ref:`i16x2<amdgpu_synid906_type_dev>`, :ref:`src1<amdgpu_synid906_src32_4>`::ref:`i16x2<amdgpu_synid906_type_dev>`, :ref:`src2<amdgpu_synid906_src32_2>`::ref:`i32<amdgpu_synid906_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot2_u32_u16 :ref:`vdst<amdgpu_synid906_vdst32_0>`, :ref:`src0<amdgpu_synid906_src32_3>`::ref:`u16x2<amdgpu_synid906_type_dev>`, :ref:`src1<amdgpu_synid906_src32_4>`::ref:`u16x2<amdgpu_synid906_type_dev>`, :ref:`src2<amdgpu_synid906_src32_2>`::ref:`u32<amdgpu_synid906_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot4_i32_i8 :ref:`vdst<amdgpu_synid906_vdst32_0>`, :ref:`src0<amdgpu_synid906_src32_1>`::ref:`i8x4<amdgpu_synid906_type_dev>`, :ref:`src1<amdgpu_synid906_src32_2>`::ref:`i8x4<amdgpu_synid906_type_dev>`, :ref:`src2<amdgpu_synid906_src32_2>`::ref:`i32<amdgpu_synid906_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot4_u32_u8 :ref:`vdst<amdgpu_synid906_vdst32_0>`, :ref:`src0<amdgpu_synid906_src32_1>`::ref:`u8x4<amdgpu_synid906_type_dev>`, :ref:`src1<amdgpu_synid906_src32_2>`::ref:`u8x4<amdgpu_synid906_type_dev>`, :ref:`src2<amdgpu_synid906_src32_2>`::ref:`u32<amdgpu_synid906_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot8_i32_i4 :ref:`vdst<amdgpu_synid906_vdst32_0>`, :ref:`src0<amdgpu_synid906_src32_1>`::ref:`i4x8<amdgpu_synid906_type_dev>`, :ref:`src1<amdgpu_synid906_src32_2>`::ref:`i4x8<amdgpu_synid906_type_dev>`, :ref:`src2<amdgpu_synid906_src32_2>`::ref:`i32<amdgpu_synid906_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot8_u32_u4 :ref:`vdst<amdgpu_synid906_vdst32_0>`, :ref:`src0<amdgpu_synid906_src32_1>`::ref:`u4x8<amdgpu_synid906_type_dev>`, :ref:`src1<amdgpu_synid906_src32_2>`::ref:`u4x8<amdgpu_synid906_type_dev>`, :ref:`src2<amdgpu_synid906_src32_2>`::ref:`u32<amdgpu_synid906_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_mix_f32 :ref:`vdst<amdgpu_synid906_vdst32_0>`, :ref:`src0<amdgpu_synid906_src32_1>`::ref:`m<amdgpu_synid906_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid906_mad_type_dev>`, :ref:`src1<amdgpu_synid906_src32_2>`::ref:`m<amdgpu_synid906_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid906_mad_type_dev>`, :ref:`src2<amdgpu_synid906_src32_2>`::ref:`m<amdgpu_synid906_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid906_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_mixhi_f16 :ref:`vdst<amdgpu_synid906_vdst32_0>`, :ref:`src0<amdgpu_synid906_src32_1>`::ref:`m<amdgpu_synid906_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid906_mad_type_dev>`, :ref:`src1<amdgpu_synid906_src32_2>`::ref:`m<amdgpu_synid906_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid906_mad_type_dev>`, :ref:`src2<amdgpu_synid906_src32_2>`::ref:`m<amdgpu_synid906_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid906_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_mixlo_f16 :ref:`vdst<amdgpu_synid906_vdst32_0>`, :ref:`src0<amdgpu_synid906_src32_1>`::ref:`m<amdgpu_synid906_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid906_mad_type_dev>`, :ref:`src1<amdgpu_synid906_src32_2>`::ref:`m<amdgpu_synid906_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid906_mad_type_dev>`, :ref:`src2<amdgpu_synid906_src32_2>`::ref:`m<amdgpu_synid906_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid906_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_dot2_f32_f16 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`f16x2<amdgpu_synid_gfx906_type_deviation>`, :ref:`src1<amdgpu_synid_gfx906_src_1>`::ref:`f16x2<amdgpu_synid_gfx906_type_deviation>`, :ref:`src2<amdgpu_synid_gfx906_src_1>`::ref:`f32<amdgpu_synid_gfx906_type_deviation>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot2_i32_i16 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_3>`::ref:`i16x2<amdgpu_synid_gfx906_type_deviation>`, :ref:`src1<amdgpu_synid_gfx906_src_4>`::ref:`i16x2<amdgpu_synid_gfx906_type_deviation>`, :ref:`src2<amdgpu_synid_gfx906_src_1>`::ref:`i32<amdgpu_synid_gfx906_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot2_u32_u16 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_3>`::ref:`u16x2<amdgpu_synid_gfx906_type_deviation>`, :ref:`src1<amdgpu_synid_gfx906_src_4>`::ref:`u16x2<amdgpu_synid_gfx906_type_deviation>`, :ref:`src2<amdgpu_synid_gfx906_src_1>`::ref:`u32<amdgpu_synid_gfx906_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot4_i32_i8 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`i8x4<amdgpu_synid_gfx906_type_deviation>`, :ref:`src1<amdgpu_synid_gfx906_src_1>`::ref:`i8x4<amdgpu_synid_gfx906_type_deviation>`, :ref:`src2<amdgpu_synid_gfx906_src_1>`::ref:`i32<amdgpu_synid_gfx906_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot4_u32_u8 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`u8x4<amdgpu_synid_gfx906_type_deviation>`, :ref:`src1<amdgpu_synid_gfx906_src_1>`::ref:`u8x4<amdgpu_synid_gfx906_type_deviation>`, :ref:`src2<amdgpu_synid_gfx906_src_1>`::ref:`u32<amdgpu_synid_gfx906_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot8_i32_i4 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`i4x8<amdgpu_synid_gfx906_type_deviation>`, :ref:`src1<amdgpu_synid_gfx906_src_1>`::ref:`i4x8<amdgpu_synid_gfx906_type_deviation>`, :ref:`src2<amdgpu_synid_gfx906_src_1>`::ref:`i32<amdgpu_synid_gfx906_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot8_u32_u4 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`u4x8<amdgpu_synid_gfx906_type_deviation>`, :ref:`src1<amdgpu_synid_gfx906_src_1>`::ref:`u4x8<amdgpu_synid_gfx906_type_deviation>`, :ref:`src2<amdgpu_synid_gfx906_src_1>`::ref:`u32<amdgpu_synid_gfx906_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_mix_f32 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`m<amdgpu_synid_gfx906_m>`::ref:`fx<amdgpu_synid_gfx906_fx_operand>`, :ref:`src1<amdgpu_synid_gfx906_src_1>`::ref:`m<amdgpu_synid_gfx906_m>`::ref:`fx<amdgpu_synid_gfx906_fx_operand>`, :ref:`src2<amdgpu_synid_gfx906_src_1>`::ref:`m<amdgpu_synid_gfx906_m>`::ref:`fx<amdgpu_synid_gfx906_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_mixhi_f16 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`m<amdgpu_synid_gfx906_m>`::ref:`fx<amdgpu_synid_gfx906_fx_operand>`, :ref:`src1<amdgpu_synid_gfx906_src_1>`::ref:`m<amdgpu_synid_gfx906_m>`::ref:`fx<amdgpu_synid_gfx906_fx_operand>`, :ref:`src2<amdgpu_synid_gfx906_src_1>`::ref:`m<amdgpu_synid_gfx906_m>`::ref:`fx<amdgpu_synid_gfx906_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_mixlo_f16 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_src_2>`::ref:`m<amdgpu_synid_gfx906_m>`::ref:`fx<amdgpu_synid_gfx906_fx_operand>`, :ref:`src1<amdgpu_synid_gfx906_src_1>`::ref:`m<amdgpu_synid_gfx906_m>`::ref:`fx<amdgpu_synid_gfx906_fx_operand>`, :ref:`src2<amdgpu_synid_gfx906_src_1>`::ref:`m<amdgpu_synid_gfx906_m>`::ref:`fx<amdgpu_synid_gfx906_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
|
||||
.. |---| unicode:: U+02014 .. em dash
|
||||
|
||||
|
||||
.. toctree::
|
||||
:hidden:
|
||||
|
||||
AMDGPUAsmGFX9
|
||||
gfx906_src32_0
|
||||
gfx906_src32_1
|
||||
gfx906_src32_2
|
||||
gfx906_src32_3
|
||||
gfx906_src32_4
|
||||
gfx906_vdst32_0
|
||||
gfx906_vsrc32_0
|
||||
gfx906_mad_type_dev
|
||||
gfx906_mod_dpp_sdwa_abs_neg
|
||||
gfx906_mod_sdwa_sext
|
||||
gfx906_mod_vop3_abs_neg
|
||||
gfx906_type_dev
|
||||
gfx906_fx_operand
|
||||
gfx906_m
|
||||
gfx906_m_1
|
||||
gfx906_src
|
||||
gfx906_src_1
|
||||
gfx906_src_2
|
||||
gfx906_src_3
|
||||
gfx906_src_4
|
||||
gfx906_type_deviation
|
||||
gfx906_vdst
|
||||
gfx906_vsrc
|
||||
|
|
|
|||
|
|
@ -38,42 +38,42 @@ FLAT
|
|||
|
||||
.. parsed-literal::
|
||||
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
global_atomic_add_f32 :ref:`vdst<amdgpu_synid908_dst_flat_atomic32>`::ref:`opt<amdgpu_synid908_opt>`, :ref:`vaddr<amdgpu_synid908_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid908_vdata32_0>`, :ref:`saddr<amdgpu_synid908_saddr_flat_global>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`slc<amdgpu_synid_slc>`
|
||||
global_atomic_pk_add_f16 :ref:`vdst<amdgpu_synid908_dst_flat_atomic32>`::ref:`opt<amdgpu_synid908_opt>`::ref:`f16x2<amdgpu_synid908_type_dev>`, :ref:`vaddr<amdgpu_synid908_vaddr_flat_global>`, :ref:`vdata<amdgpu_synid908_vdata32_0>`::ref:`f16x2<amdgpu_synid908_type_dev>`, :ref:`saddr<amdgpu_synid908_saddr_flat_global>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`slc<amdgpu_synid_slc>`
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
global_atomic_add_f32 :ref:`vdst<amdgpu_synid_gfx908_vdst>`::ref:`opt<amdgpu_synid_gfx908_opt>`, :ref:`vaddr<amdgpu_synid_gfx908_vaddr>`, :ref:`vdata<amdgpu_synid_gfx908_vdata>`, :ref:`saddr<amdgpu_synid_gfx908_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`slc<amdgpu_synid_slc>`
|
||||
global_atomic_pk_add_f16 :ref:`vdst<amdgpu_synid_gfx908_vdst>`::ref:`opt<amdgpu_synid_gfx908_opt>`, :ref:`vaddr<amdgpu_synid_gfx908_vaddr>`, :ref:`vdata<amdgpu_synid_gfx908_vdata>`, :ref:`saddr<amdgpu_synid_gfx908_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`slc<amdgpu_synid_slc>`
|
||||
|
||||
MUBUF
|
||||
-----------------------
|
||||
|
||||
.. parsed-literal::
|
||||
|
||||
**INSTRUCTION** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
buffer_atomic_add_f32 :ref:`vdata<amdgpu_synid908_data_buf_atomic32>`::ref:`dst<amdgpu_synid908_ret>`, :ref:`vaddr<amdgpu_synid908_addr_buf>`, :ref:`srsrc<amdgpu_synid908_rsrc_buf>`, :ref:`soffset<amdgpu_synid908_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`slc<amdgpu_synid_slc>`
|
||||
buffer_atomic_pk_add_f16 :ref:`vdata<amdgpu_synid908_data_buf_atomic32>`::ref:`dst<amdgpu_synid908_ret>`::ref:`f16x2<amdgpu_synid908_type_dev>`, :ref:`vaddr<amdgpu_synid908_addr_buf>`, :ref:`srsrc<amdgpu_synid908_rsrc_buf>`, :ref:`soffset<amdgpu_synid908_offset_buf>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`slc<amdgpu_synid_slc>`
|
||||
**INSTRUCTION** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
buffer_atomic_add_f32 :ref:`vdata<amdgpu_synid_gfx908_vdata_1>`::ref:`dst<amdgpu_synid_gfx908_dst>`, :ref:`vaddr<amdgpu_synid_gfx908_vaddr_1>`, :ref:`srsrc<amdgpu_synid_gfx908_srsrc>`, :ref:`soffset<amdgpu_synid_gfx908_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`slc<amdgpu_synid_slc>`
|
||||
buffer_atomic_pk_add_f16 :ref:`vdata<amdgpu_synid_gfx908_vdata_1>`::ref:`dst<amdgpu_synid_gfx908_dst>`, :ref:`vaddr<amdgpu_synid_gfx908_vaddr_1>`, :ref:`srsrc<amdgpu_synid_gfx908_srsrc>`, :ref:`soffset<amdgpu_synid_gfx908_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`slc<amdgpu_synid_slc>`
|
||||
|
||||
VOP2
|
||||
-----------------------
|
||||
|
||||
.. parsed-literal::
|
||||
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_dot2c_f32_f16 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_0>`::ref:`f16x2<amdgpu_synid908_type_dev>`, :ref:`vsrc1<amdgpu_synid908_vsrc32_0>`::ref:`f16x2<amdgpu_synid908_type_dev>`
|
||||
v_dot2c_f32_f16_dpp :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`vsrc0<amdgpu_synid908_vsrc32_0>`::ref:`f16x2<amdgpu_synid908_type_dev>`, :ref:`vsrc1<amdgpu_synid908_vsrc32_0>`::ref:`f16x2<amdgpu_synid908_type_dev>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_dot2c_i32_i16 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_0>`::ref:`i16x2<amdgpu_synid908_type_dev>`, :ref:`vsrc1<amdgpu_synid908_vsrc32_0>`::ref:`i16x2<amdgpu_synid908_type_dev>`
|
||||
v_dot2c_i32_i16_dpp :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`vsrc0<amdgpu_synid908_vsrc32_0>`::ref:`i16x2<amdgpu_synid908_type_dev>`, :ref:`vsrc1<amdgpu_synid908_vsrc32_0>`::ref:`i16x2<amdgpu_synid908_type_dev>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_dot4c_i32_i8 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_0>`::ref:`i8x4<amdgpu_synid908_type_dev>`, :ref:`vsrc1<amdgpu_synid908_vsrc32_0>`::ref:`i8x4<amdgpu_synid908_type_dev>`
|
||||
v_dot4c_i32_i8_dpp :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`vsrc0<amdgpu_synid908_vsrc32_0>`::ref:`i8x4<amdgpu_synid908_type_dev>`, :ref:`vsrc1<amdgpu_synid908_vsrc32_0>`::ref:`i8x4<amdgpu_synid908_type_dev>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_dot8c_i32_i4 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_0>`::ref:`i4x8<amdgpu_synid908_type_dev>`, :ref:`vsrc1<amdgpu_synid908_vsrc32_0>`::ref:`i4x8<amdgpu_synid908_type_dev>`
|
||||
v_dot8c_i32_i4_dpp :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`vsrc0<amdgpu_synid908_vsrc32_0>`::ref:`i4x8<amdgpu_synid908_type_dev>`, :ref:`vsrc1<amdgpu_synid908_vsrc32_0>`::ref:`i4x8<amdgpu_synid908_type_dev>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_fmac_f32 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_0>`, :ref:`vsrc1<amdgpu_synid908_vsrc32_0>`
|
||||
v_fmac_f32_dpp :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`vsrc0<amdgpu_synid908_vsrc32_0>`::ref:`m<amdgpu_synid908_mod_dpp_sdwa_abs_neg>`, :ref:`vsrc1<amdgpu_synid908_vsrc32_0>`::ref:`m<amdgpu_synid908_mod_dpp_sdwa_abs_neg>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_pk_fmac_f16 :ref:`vdst<amdgpu_synid908_vdst32_0>`::ref:`f16x2<amdgpu_synid908_type_dev>`, :ref:`src0<amdgpu_synid908_src32_0>`::ref:`f16x2<amdgpu_synid908_type_dev>`, :ref:`vsrc1<amdgpu_synid908_vsrc32_0>`::ref:`f16x2<amdgpu_synid908_type_dev>`
|
||||
v_xnor_b32 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_0>`, :ref:`vsrc1<amdgpu_synid908_vsrc32_0>`
|
||||
v_xnor_b32_dpp :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`vsrc0<amdgpu_synid908_vsrc32_0>`, :ref:`vsrc1<amdgpu_synid908_vsrc32_0>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_xnor_b32_sdwa :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_0>`::ref:`m<amdgpu_synid908_mod_sdwa_sext>`, :ref:`vsrc1<amdgpu_synid908_vsrc32_0>`::ref:`m<amdgpu_synid908_mod_sdwa_sext>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_dot2c_f32_f16 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src>`::ref:`f16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`f16x2<amdgpu_synid_gfx908_type_deviation>`
|
||||
v_dot2c_f32_f16_dpp :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc>`::ref:`f16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`f16x2<amdgpu_synid_gfx908_type_deviation>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_dot2c_i32_i16 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src>`::ref:`i16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`i16x2<amdgpu_synid_gfx908_type_deviation>`
|
||||
v_dot2c_i32_i16_dpp :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc>`::ref:`i16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`i16x2<amdgpu_synid_gfx908_type_deviation>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_dot4c_i32_i8 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`
|
||||
v_dot4c_i32_i8_dpp :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_dot8c_i32_i4 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src>`::ref:`i4x8<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`i4x8<amdgpu_synid_gfx908_type_deviation>`
|
||||
v_dot8c_i32_i4_dpp :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc>`::ref:`i4x8<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`i4x8<amdgpu_synid_gfx908_type_deviation>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_fmac_f32 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`
|
||||
v_fmac_f32_dpp :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc>`::ref:`m<amdgpu_synid_gfx908_m>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`::ref:`m<amdgpu_synid_gfx908_m>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_pk_fmac_f16 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`
|
||||
v_xnor_b32 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>`
|
||||
v_xnor_b32_dpp :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
|
||||
v_xnor_b32_sdwa :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m_1>`, :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
|
||||
|
||||
VOP3
|
||||
-----------------------
|
||||
|
|
@ -81,87 +81,84 @@ VOP3
|
|||
.. parsed-literal::
|
||||
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_fmac_f32_e64 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_1>`::ref:`m<amdgpu_synid908_mod_vop3_abs_neg>`, :ref:`src1<amdgpu_synid908_src32_2>`::ref:`m<amdgpu_synid908_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_xnor_b32_e64 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_1>`, :ref:`src1<amdgpu_synid908_src32_2>`
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_fmac_f32_e64 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`m<amdgpu_synid_gfx908_m>`, :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
|
||||
v_xnor_b32_e64 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src_2>`, :ref:`src1<amdgpu_synid_gfx908_src_1>`
|
||||
|
||||
VOP3P
|
||||
-----------------------
|
||||
|
||||
.. parsed-literal::
|
||||
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_accvgpr_read_b32 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`asrc<amdgpu_synid908_asrc32_0>`
|
||||
v_accvgpr_write_b32 :ref:`adst<amdgpu_synid908_adst32_0>`, :ref:`src<amdgpu_synid908_src32_3>`
|
||||
v_dot2_f32_f16 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_1>`::ref:`f16x2<amdgpu_synid908_type_dev>`, :ref:`src1<amdgpu_synid908_src32_2>`::ref:`f16x2<amdgpu_synid908_type_dev>`, :ref:`src2<amdgpu_synid908_src32_2>`::ref:`f32<amdgpu_synid908_type_dev>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot2_i32_i16 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_4>`::ref:`i16x2<amdgpu_synid908_type_dev>`, :ref:`src1<amdgpu_synid908_src32_5>`::ref:`i16x2<amdgpu_synid908_type_dev>`, :ref:`src2<amdgpu_synid908_src32_2>`::ref:`i32<amdgpu_synid908_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot2_u32_u16 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_4>`::ref:`u16x2<amdgpu_synid908_type_dev>`, :ref:`src1<amdgpu_synid908_src32_5>`::ref:`u16x2<amdgpu_synid908_type_dev>`, :ref:`src2<amdgpu_synid908_src32_2>`::ref:`u32<amdgpu_synid908_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot4_i32_i8 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_1>`::ref:`i8x4<amdgpu_synid908_type_dev>`, :ref:`src1<amdgpu_synid908_src32_2>`::ref:`i8x4<amdgpu_synid908_type_dev>`, :ref:`src2<amdgpu_synid908_src32_2>`::ref:`i32<amdgpu_synid908_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot4_u32_u8 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_1>`::ref:`u8x4<amdgpu_synid908_type_dev>`, :ref:`src1<amdgpu_synid908_src32_2>`::ref:`u8x4<amdgpu_synid908_type_dev>`, :ref:`src2<amdgpu_synid908_src32_2>`::ref:`u32<amdgpu_synid908_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot8_i32_i4 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_1>`::ref:`i4x8<amdgpu_synid908_type_dev>`, :ref:`src1<amdgpu_synid908_src32_2>`::ref:`i4x8<amdgpu_synid908_type_dev>`, :ref:`src2<amdgpu_synid908_src32_2>`::ref:`i32<amdgpu_synid908_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot8_u32_u4 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_1>`::ref:`u4x8<amdgpu_synid908_type_dev>`, :ref:`src1<amdgpu_synid908_src32_2>`::ref:`u4x8<amdgpu_synid908_type_dev>`, :ref:`src2<amdgpu_synid908_src32_2>`::ref:`u32<amdgpu_synid908_type_dev>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_mix_f32 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_1>`::ref:`m<amdgpu_synid908_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid908_mad_type_dev>`, :ref:`src1<amdgpu_synid908_src32_2>`::ref:`m<amdgpu_synid908_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid908_mad_type_dev>`, :ref:`src2<amdgpu_synid908_src32_2>`::ref:`m<amdgpu_synid908_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid908_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_mixhi_f16 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_1>`::ref:`m<amdgpu_synid908_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid908_mad_type_dev>`, :ref:`src1<amdgpu_synid908_src32_2>`::ref:`m<amdgpu_synid908_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid908_mad_type_dev>`, :ref:`src2<amdgpu_synid908_src32_2>`::ref:`m<amdgpu_synid908_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid908_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_mixlo_f16 :ref:`vdst<amdgpu_synid908_vdst32_0>`, :ref:`src0<amdgpu_synid908_src32_1>`::ref:`m<amdgpu_synid908_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid908_mad_type_dev>`, :ref:`src1<amdgpu_synid908_src32_2>`::ref:`m<amdgpu_synid908_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid908_mad_type_dev>`, :ref:`src2<amdgpu_synid908_src32_2>`::ref:`m<amdgpu_synid908_mod_vop3_abs_neg>`::ref:`fx<amdgpu_synid908_mad_type_dev>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mfma_f32_16x16x16f16 :ref:`adst<amdgpu_synid908_adst128_0>`::ref:`f32x4<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc64_0>`::ref:`f16x4<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc64_0>`::ref:`f16x4<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc128_0>`::ref:`f32x4<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_16x16x1f32 :ref:`adst<amdgpu_synid908_adst512_0>`::ref:`f32x16<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc32_0>`::ref:`f32<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc32_0>`::ref:`f32<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc512_0>`::ref:`f32x16<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_16x16x2bf16 :ref:`adst<amdgpu_synid908_adst512_0>`::ref:`f32x16<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc32_0>`::ref:`bf16x2<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc32_0>`::ref:`bf16x2<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc512_0>`::ref:`f32x16<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_16x16x4f16 :ref:`adst<amdgpu_synid908_adst512_0>`::ref:`f32x16<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc64_0>`::ref:`f16x4<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc64_0>`::ref:`f16x4<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc512_0>`::ref:`f32x16<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_16x16x4f32 :ref:`adst<amdgpu_synid908_adst128_0>`::ref:`f32x4<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc32_0>`::ref:`f32<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc32_0>`::ref:`f32<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc128_0>`::ref:`f32x4<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_16x16x8bf16 :ref:`adst<amdgpu_synid908_adst128_0>`::ref:`f32x4<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc32_0>`::ref:`bf16x2<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc32_0>`::ref:`bf16x2<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc128_0>`::ref:`f32x4<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_32x32x1f32 :ref:`adst<amdgpu_synid908_adst1024_0>`::ref:`f32x32<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc32_0>`::ref:`f32<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc32_0>`::ref:`f32<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc1024_0>`::ref:`f32x32<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_32x32x2bf16 :ref:`adst<amdgpu_synid908_adst1024_0>`::ref:`f32x32<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc32_0>`::ref:`bf16x2<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc32_0>`::ref:`bf16x2<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc1024_0>`::ref:`f32x32<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_32x32x2f32 :ref:`adst<amdgpu_synid908_adst512_0>`::ref:`f32x16<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc32_0>`::ref:`f32<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc32_0>`::ref:`f32<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc512_0>`::ref:`f32x16<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_32x32x4bf16 :ref:`adst<amdgpu_synid908_adst512_0>`::ref:`f32x16<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc32_0>`::ref:`bf16x2<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc32_0>`::ref:`bf16x2<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc512_0>`::ref:`f32x16<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_32x32x4f16 :ref:`adst<amdgpu_synid908_adst1024_0>`::ref:`f32x32<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc64_0>`::ref:`f16x4<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc64_0>`::ref:`f16x4<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc1024_0>`::ref:`f32x32<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_32x32x8f16 :ref:`adst<amdgpu_synid908_adst512_0>`::ref:`f32x16<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc64_0>`::ref:`f16x4<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc64_0>`::ref:`f16x4<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc512_0>`::ref:`f32x16<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_4x4x1f32 :ref:`adst<amdgpu_synid908_adst128_0>`::ref:`f32x4<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc32_0>`::ref:`f32<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc32_0>`::ref:`f32<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc128_0>`::ref:`f32x4<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_4x4x2bf16 :ref:`adst<amdgpu_synid908_adst128_0>`::ref:`f32x4<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc32_0>`::ref:`bf16x2<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc32_0>`::ref:`bf16x2<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc128_0>`::ref:`f32x4<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_4x4x4f16 :ref:`adst<amdgpu_synid908_adst128_0>`::ref:`f32x4<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc64_0>`::ref:`f16x4<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc64_0>`::ref:`f16x4<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc128_0>`::ref:`f32x4<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_i32_16x16x16i8 :ref:`adst<amdgpu_synid908_adst128_0>`::ref:`i32x4<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc32_0>`::ref:`i8x4<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc32_0>`::ref:`i8x4<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc128_0>`::ref:`i32x4<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_i32_16x16x4i8 :ref:`adst<amdgpu_synid908_adst512_0>`::ref:`i32x16<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc32_0>`::ref:`i8x4<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc32_0>`::ref:`i8x4<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc512_0>`::ref:`i32x16<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_i32_32x32x4i8 :ref:`adst<amdgpu_synid908_adst1024_0>`::ref:`i32x32<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc32_0>`::ref:`i8x4<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc32_0>`::ref:`i8x4<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc1024_0>`::ref:`i32x32<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_i32_32x32x8i8 :ref:`adst<amdgpu_synid908_adst512_0>`::ref:`i32x16<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc32_0>`::ref:`i8x4<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc32_0>`::ref:`i8x4<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc512_0>`::ref:`i32x16<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_i32_4x4x4i8 :ref:`adst<amdgpu_synid908_adst128_0>`::ref:`i32x4<amdgpu_synid908_type_dev>`, :ref:`vasrc0<amdgpu_synid908_vasrc32_0>`::ref:`i8x4<amdgpu_synid908_type_dev>`, :ref:`vasrc1<amdgpu_synid908_vasrc32_0>`::ref:`i8x4<amdgpu_synid908_type_dev>`, :ref:`asrc2<amdgpu_synid908_asrc128_0>`::ref:`i32x4<amdgpu_synid908_type_dev>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
|
||||
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
|
||||
v_accvgpr_read_b32 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`vsrc<amdgpu_synid_gfx908_vsrc_1>`
|
||||
v_accvgpr_write_b32 :ref:`vdst<amdgpu_synid_gfx908_vdst_2>`, :ref:`src<amdgpu_synid_gfx908_src_3>`
|
||||
v_dot2_f32_f16 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`f16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`f16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot2_i32_i16 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src_4>`::ref:`i16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`src1<amdgpu_synid_gfx908_src_5>`::ref:`i16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`i32<amdgpu_synid_gfx908_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot2_u32_u16 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src_4>`::ref:`u16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`src1<amdgpu_synid_gfx908_src_5>`::ref:`u16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`u32<amdgpu_synid_gfx908_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot4_i32_i8 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`i32<amdgpu_synid_gfx908_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot4_u32_u8 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`u8x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`u8x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`u32<amdgpu_synid_gfx908_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot8_i32_i4 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`i4x8<amdgpu_synid_gfx908_type_deviation>`, :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`i4x8<amdgpu_synid_gfx908_type_deviation>`, :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`i32<amdgpu_synid_gfx908_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_dot8_u32_u4 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`u4x8<amdgpu_synid_gfx908_type_deviation>`, :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`u4x8<amdgpu_synid_gfx908_type_deviation>`, :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`u32<amdgpu_synid_gfx908_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_mix_f32 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>`, :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>`, :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_mixhi_f16 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>`, :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>`, :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_fma_mixlo_f16 :ref:`vdst<amdgpu_synid_gfx908_vdst_1>`, :ref:`src0<amdgpu_synid_gfx908_src_2>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>`, :ref:`src1<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>`, :ref:`src2<amdgpu_synid_gfx908_src_1>`::ref:`m<amdgpu_synid_gfx908_m>`::ref:`fx<amdgpu_synid_gfx908_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
|
||||
v_mfma_f32_16x16x16f16 :ref:`vdst<amdgpu_synid_gfx908_vdst_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_16x16x1f32 :ref:`vdst<amdgpu_synid_gfx908_vdst_4>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_5>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_16x16x2bf16 :ref:`vdst<amdgpu_synid_gfx908_vdst_4>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_5>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_16x16x4f16 :ref:`vdst<amdgpu_synid_gfx908_vdst_4>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_5>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_16x16x4f32 :ref:`vdst<amdgpu_synid_gfx908_vdst_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_16x16x8bf16 :ref:`vdst<amdgpu_synid_gfx908_vdst_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_32x32x1f32 :ref:`vdst<amdgpu_synid_gfx908_vdst_5>`::ref:`f32x32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_6>`::ref:`f32x32<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_32x32x2bf16 :ref:`vdst<amdgpu_synid_gfx908_vdst_5>`::ref:`f32x32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_6>`::ref:`f32x32<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_32x32x2f32 :ref:`vdst<amdgpu_synid_gfx908_vdst_4>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_5>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_32x32x4bf16 :ref:`vdst<amdgpu_synid_gfx908_vdst_4>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_5>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_32x32x4f16 :ref:`vdst<amdgpu_synid_gfx908_vdst_5>`::ref:`f32x32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_6>`::ref:`f32x32<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_32x32x8f16 :ref:`vdst<amdgpu_synid_gfx908_vdst_4>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_5>`::ref:`f32x16<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_4x4x1f32 :ref:`vdst<amdgpu_synid_gfx908_vdst_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`f32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_4x4x2bf16 :ref:`vdst<amdgpu_synid_gfx908_vdst_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`bf16x2<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_f32_4x4x4f16 :ref:`vdst<amdgpu_synid_gfx908_vdst_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_2>`::ref:`f16x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_3>`::ref:`f32x4<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_i32_16x16x16i8 :ref:`vdst<amdgpu_synid_gfx908_vdst_3>`::ref:`i32x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_3>`::ref:`i32x4<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_i32_16x16x4i8 :ref:`vdst<amdgpu_synid_gfx908_vdst_4>`::ref:`i32x16<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_5>`::ref:`i32x16<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_i32_32x32x4i8 :ref:`vdst<amdgpu_synid_gfx908_vdst_5>`::ref:`i32x32<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_6>`::ref:`i32x32<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_i32_32x32x8i8 :ref:`vdst<amdgpu_synid_gfx908_vdst_4>`::ref:`i32x16<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_5>`::ref:`i32x16<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
v_mfma_i32_4x4x4i8 :ref:`vdst<amdgpu_synid_gfx908_vdst_3>`::ref:`i32x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx908_vsrc_4>`::ref:`i8x4<amdgpu_synid_gfx908_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx908_vsrc_3>`::ref:`i32x4<amdgpu_synid_gfx908_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
|
||||
|
||||
.. |---| unicode:: U+02014 .. em dash
|
||||
|
||||
|
||||
.. toctree::
|
||||
:hidden:
|
||||
|
||||
AMDGPUAsmGFX9
|
||||
gfx908_addr_buf
|
||||
gfx908_adst1024_0
|
||||
gfx908_adst128_0
|
||||
gfx908_adst32_0
|
||||
gfx908_adst512_0
|
||||
gfx908_asrc1024_0
|
||||
gfx908_asrc128_0
|
||||
gfx908_asrc32_0
|
||||
gfx908_asrc512_0
|
||||
gfx908_data_buf_atomic32
|
||||
gfx908_dst_flat_atomic32
|
||||
gfx908_offset_buf
|
||||
gfx908_rsrc_buf
|
||||
gfx908_saddr_flat_global
|
||||
gfx908_src32_0
|
||||
gfx908_src32_1
|
||||
gfx908_src32_2
|
||||
gfx908_src32_3
|
||||
gfx908_src32_4
|
||||
gfx908_src32_5
|
||||
gfx908_vaddr_flat_global
|
||||
gfx908_vasrc32_0
|
||||
gfx908_vasrc64_0
|
||||
gfx908_vdata32_0
|
||||
gfx908_vdst32_0
|
||||
gfx908_vsrc32_0
|
||||
gfx908_mad_type_dev
|
||||
gfx908_mod_dpp_sdwa_abs_neg
|
||||
gfx908_mod_sdwa_sext
|
||||
gfx908_mod_vop3_abs_neg
|
||||
gfx908_dst
|
||||
gfx908_fx_operand
|
||||
gfx908_m
|
||||
gfx908_m_1
|
||||
gfx908_opt
|
||||
gfx908_ret
|
||||
gfx908_type_dev
|
||||
gfx908_saddr
|
||||
gfx908_soffset
|
||||
gfx908_src
|
||||
gfx908_src_1
|
||||
gfx908_src_2
|
||||
gfx908_src_3
|
||||
gfx908_src_4
|
||||
gfx908_src_5
|
||||
gfx908_srsrc
|
||||
gfx908_type_deviation
|
||||
gfx908_vaddr
|
||||
gfx908_vaddr_1
|
||||
gfx908_vdata
|
||||
gfx908_vdata_1
|
||||
gfx908_vdst
|
||||
gfx908_vdst_1
|
||||
gfx908_vdst_2
|
||||
gfx908_vdst_3
|
||||
gfx908_vdst_4
|
||||
gfx908_vdst_5
|
||||
gfx908_vsrc
|
||||
gfx908_vsrc_1
|
||||
gfx908_vsrc_2
|
||||
gfx908_vsrc_3
|
||||
gfx908_vsrc_4
|
||||
gfx908_vsrc_5
|
||||
gfx908_vsrc_6
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_src32_2:
|
||||
.. _amdgpu_synid_gfx1011_src:
|
||||
|
||||
src
|
||||
===========================
|
||||
===
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_src32_4:
|
||||
.. _amdgpu_synid_gfx1011_src_1:
|
||||
|
||||
src
|
||||
===========================
|
||||
===
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,13 +5,13 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_src32_3:
|
||||
.. _amdgpu_synid_gfx1011_src_2:
|
||||
|
||||
src
|
||||
===========================
|
||||
===
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`literal<amdgpu_synid_literal>`
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`ival<amdgpu_synid_ival>`, :ref:`literal<amdgpu_synid_literal>`
|
||||
|
|
@ -5,13 +5,13 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_src32_1:
|
||||
.. _amdgpu_synid_gfx1011_src_3:
|
||||
|
||||
src
|
||||
===========================
|
||||
===
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`iconst<amdgpu_synid_iconst>`
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`ival<amdgpu_synid_ival>`, :ref:`literal<amdgpu_synid_literal>`
|
||||
|
|
@ -1,13 +0,0 @@
|
|||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid1011_type_dev:
|
||||
|
||||
Type deviation
|
||||
===========================
|
||||
|
||||
*Type* of this operand differs from *type* :ref:`implied by the opcode<amdgpu_syn_instruction_type>`. This tag specifies actual operand *type*.
|
||||
|
|
@ -5,9 +5,9 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_type_dev:
|
||||
.. _amdgpu_synid_gfx1011_type_deviation:
|
||||
|
||||
Type deviation
|
||||
===========================
|
||||
Type Deviation
|
||||
==============
|
||||
|
||||
*Type* of this operand differs from *type* :ref:`implied by the opcode<amdgpu_syn_instruction_type>`. This tag specifies actual operand *type*.
|
||||
*Type* of this operand differs from *type* :ref:`implied by the opcode<amdgpu_syn_instruction_mnemo>`. This tag specifies actual operand *type*.
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid7_vdst32_0:
|
||||
.. _amdgpu_synid_gfx1011_vdst:
|
||||
|
||||
vdst
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction output.
|
||||
|
||||
|
|
@ -1,17 +0,0 @@
|
|||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid1011_vdst32_0:
|
||||
|
||||
vdst
|
||||
===========================
|
||||
|
||||
Instruction output.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_vsrc32_0:
|
||||
.. _amdgpu_synid_gfx1011_vsrc:
|
||||
|
||||
vsrc
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -1,17 +0,0 @@
|
|||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid1011_vsrc32_0:
|
||||
|
||||
vsrc
|
||||
===========================
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_attr:
|
||||
.. _amdgpu_synid_gfx10_attr:
|
||||
|
||||
attr
|
||||
===========================
|
||||
====
|
||||
|
||||
Interpolation attribute and channel:
|
||||
|
||||
|
|
|
|||
|
|
@ -5,9 +5,9 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid7_ret:
|
||||
.. _amdgpu_synid_gfx10_dst:
|
||||
|
||||
dst
|
||||
===========================
|
||||
===
|
||||
|
||||
This is an input operand. It may optionally serve as a destination if :ref:`glc<amdgpu_synid_glc>` is specified.
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_mad_type_dev:
|
||||
.. _amdgpu_synid_gfx10_fx_operand:
|
||||
|
||||
fx
|
||||
===========================
|
||||
FX Operand
|
||||
==========
|
||||
|
||||
This is an *f32* or *f16* operand depending on instruction modifiers:
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_hwreg:
|
||||
.. _amdgpu_synid_gfx10_hwreg:
|
||||
|
||||
hwreg
|
||||
===========================
|
||||
=====
|
||||
|
||||
Bits of a hardware register being accessed.
|
||||
|
||||
|
|
|
|||
|
|
@ -5,9 +5,9 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid7_simm16:
|
||||
.. _amdgpu_synid_gfx10_imm16:
|
||||
|
||||
imm16
|
||||
===========================
|
||||
=====
|
||||
|
||||
An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range -32768..65535.
|
||||
|
|
@ -5,9 +5,9 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_uimm16:
|
||||
.. _amdgpu_synid_gfx10_imm16_1:
|
||||
|
||||
imm16
|
||||
===========================
|
||||
=====
|
||||
|
||||
An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range 0..65535.
|
||||
|
|
@ -5,9 +5,9 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_bimm16:
|
||||
.. _amdgpu_synid_gfx10_imm16_2:
|
||||
|
||||
imm16
|
||||
===========================
|
||||
=====
|
||||
|
||||
A 16-bit :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range -32768..65535.
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_label:
|
||||
.. _amdgpu_synid_gfx10_label:
|
||||
|
||||
label
|
||||
===========================
|
||||
=====
|
||||
|
||||
A branch target which is a 16-bit signed integer treated as a PC-relative dword offset.
|
||||
|
||||
|
|
|
|||
|
|
@ -5,9 +5,9 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid7_mod:
|
||||
.. _amdgpu_synid_gfx10_m:
|
||||
|
||||
m
|
||||
===========================
|
||||
=
|
||||
|
||||
This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :ref:`neg<amdgpu_synid_neg>`.
|
||||
|
|
@ -5,9 +5,9 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_mod_sdwa_sext:
|
||||
.. _amdgpu_synid_gfx10_m_1:
|
||||
|
||||
m
|
||||
===========================
|
||||
=
|
||||
|
||||
This operand may be used with integer operand modifier :ref:`sext<amdgpu_synid_sext>`.
|
||||
|
|
@ -1,13 +0,0 @@
|
|||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_mod_dpp_sdwa_abs_neg:
|
||||
|
||||
m
|
||||
===========================
|
||||
|
||||
This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :ref:`neg<amdgpu_synid_neg>`.
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_msg:
|
||||
.. _amdgpu_synid_gfx10_msg:
|
||||
|
||||
msg
|
||||
===========================
|
||||
===
|
||||
|
||||
A 16-bit message code. The bits of this operand have the following meaning:
|
||||
|
||||
|
|
@ -99,4 +99,3 @@ Examples:
|
|||
stream = 1
|
||||
s_sendmsg sendmsg(msg, op, stream)
|
||||
s_sendmsg sendmsg(2, GS_OP_CUT)
|
||||
|
||||
|
|
|
|||
|
|
@ -5,9 +5,9 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_opt:
|
||||
.. _amdgpu_synid_gfx10_opt:
|
||||
|
||||
opt
|
||||
===========================
|
||||
===
|
||||
|
||||
This is an optional operand. It must be used if and only if :ref:`glc<amdgpu_synid_glc>` is specified.
|
||||
|
|
|
|||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_param:
|
||||
.. _amdgpu_synid_gfx10_param:
|
||||
|
||||
param
|
||||
===========================
|
||||
=====
|
||||
|
||||
Interpolation parameter to read:
|
||||
|
||||
|
|
|
|||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_perm_smem:
|
||||
.. _amdgpu_synid_gfx10_probe:
|
||||
|
||||
imm3
|
||||
===========================
|
||||
probe
|
||||
=====
|
||||
|
||||
A bit mask which indicates request permissions.
|
||||
|
||||
|
|
@ -5,15 +5,15 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_saddr_flat_global:
|
||||
.. _amdgpu_synid_gfx10_saddr:
|
||||
|
||||
saddr
|
||||
===========================
|
||||
=====
|
||||
|
||||
An optional 64-bit flat global address. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
|
||||
|
||||
See :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>` for description of available addressing modes.
|
||||
See :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>` for description of available addressing modes.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`off<amdgpu_synid_off>`
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`off<amdgpu_synid_off>`
|
||||
|
|
@ -5,15 +5,15 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_saddr_flat_scratch:
|
||||
.. _amdgpu_synid_gfx10_saddr_1:
|
||||
|
||||
saddr
|
||||
===========================
|
||||
=====
|
||||
|
||||
An optional 32-bit flat scratch offset. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
|
||||
|
||||
Either this operand or :ref:`vaddr<amdgpu_synid10_vaddr_flat_scratch>` must be set to :ref:`off<amdgpu_synid_off>`.
|
||||
Either this operand or :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>` must be set to :ref:`off<amdgpu_synid_off>`.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`off<amdgpu_synid_off>`
|
||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`off<amdgpu_synid_off>`
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_base_smem_addr:
|
||||
.. _amdgpu_synid_gfx10_sbase:
|
||||
|
||||
sbase
|
||||
===========================
|
||||
=====
|
||||
|
||||
A 64-bit base address for scalar memory operations.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid7_base_smem_buf:
|
||||
.. _amdgpu_synid_gfx10_sbase_1:
|
||||
|
||||
sbase
|
||||
===========================
|
||||
=====
|
||||
|
||||
A 128-bit buffer resource constant for scalar memory operations which provides a base address, a size and a stride.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_base_smem_scratch:
|
||||
.. _amdgpu_synid_gfx10_sbase_2:
|
||||
|
||||
sbase
|
||||
===========================
|
||||
=====
|
||||
|
||||
This operand is ignored by H/W and :ref:`flat_scratch<amdgpu_synid_flat_scratch>` is supplied instead.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_data_smem_atomic32:
|
||||
.. _amdgpu_synid_gfx10_sdata:
|
||||
|
||||
sdata
|
||||
===========================
|
||||
=====
|
||||
|
||||
Input data for an atomic instruction.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_data_smem_atomic64:
|
||||
.. _amdgpu_synid_gfx10_sdata_1:
|
||||
|
||||
sdata
|
||||
===========================
|
||||
=====
|
||||
|
||||
Input data for an atomic instruction.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_data_smem_atomic128:
|
||||
.. _amdgpu_synid_gfx10_sdata_2:
|
||||
|
||||
sdata
|
||||
===========================
|
||||
=====
|
||||
|
||||
Input data for an atomic instruction.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdata32_0:
|
||||
.. _amdgpu_synid_gfx10_sdata_3:
|
||||
|
||||
sdata
|
||||
===========================
|
||||
=====
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdata64_0:
|
||||
.. _amdgpu_synid_gfx10_sdata_4:
|
||||
|
||||
sdata
|
||||
===========================
|
||||
=====
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_sdata128_0:
|
||||
.. _amdgpu_synid_gfx10_sdata_5:
|
||||
|
||||
sdata
|
||||
===========================
|
||||
=====
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_wsdst:
|
||||
.. _amdgpu_synid_gfx10_sdst:
|
||||
|
||||
sdst
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction output.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdst32_0:
|
||||
.. _amdgpu_synid_gfx10_sdst_1:
|
||||
|
||||
sdst
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction output.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdst512_0:
|
||||
.. _amdgpu_synid_gfx10_sdst_2:
|
||||
|
||||
sdst
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction output.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdst64_0:
|
||||
.. _amdgpu_synid_gfx10_sdst_3:
|
||||
|
||||
sdst
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction output.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_sdst128_0:
|
||||
.. _amdgpu_synid_gfx10_sdst_4:
|
||||
|
||||
sdst
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction output.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_sdst256_0:
|
||||
.. _amdgpu_synid_gfx10_sdst_5:
|
||||
|
||||
sdst
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction output.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdst32_1:
|
||||
.. _amdgpu_synid_gfx10_sdst_6:
|
||||
|
||||
sdst
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction output.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdst64_1:
|
||||
.. _amdgpu_synid_gfx10_sdst_7:
|
||||
|
||||
sdst
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction output.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_sdst32_2:
|
||||
.. _amdgpu_synid_gfx10_sdst_8:
|
||||
|
||||
sdst
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction output.
|
||||
|
||||
|
|
@ -5,9 +5,9 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_bimm32:
|
||||
.. _amdgpu_synid_gfx10_simm32:
|
||||
|
||||
imm32
|
||||
===========================
|
||||
simm32
|
||||
======
|
||||
|
||||
An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value is truncated to 32 bits.
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_fimm16:
|
||||
.. _amdgpu_synid_gfx10_simm32_1:
|
||||
|
||||
imm32
|
||||
===========================
|
||||
simm32
|
||||
======
|
||||
|
||||
A :ref:`floating-point_number<amdgpu_synid_floating-point_number>`, an :ref:`integer_number<amdgpu_synid_integer_number>`, or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`.
|
||||
The value is converted to *f16* as described :ref:`here<amdgpu_synid_fp_conv>`.
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_fimm32:
|
||||
.. _amdgpu_synid_gfx10_simm32_2:
|
||||
|
||||
imm32
|
||||
===========================
|
||||
simm32
|
||||
======
|
||||
|
||||
A :ref:`floating-point_number<amdgpu_synid_floating-point_number>`, an :ref:`integer_number<amdgpu_synid_integer_number>`, or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`.
|
||||
The value is converted to *f32* as described :ref:`here<amdgpu_synid_fp_conv>`.
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_offset_buf:
|
||||
.. _amdgpu_synid_gfx10_soffset:
|
||||
|
||||
soffset
|
||||
===========================
|
||||
=======
|
||||
|
||||
An unsigned byte offset.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_offset_smem_plain:
|
||||
.. _amdgpu_synid_gfx10_soffset_1:
|
||||
|
||||
soffset
|
||||
===========================
|
||||
=======
|
||||
|
||||
An offset added to the base address to get memory address.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_offset_smem_buf:
|
||||
.. _amdgpu_synid_gfx10_soffset_2:
|
||||
|
||||
soffset
|
||||
===========================
|
||||
=======
|
||||
|
||||
An unsigned 20-bit offset added to the base address to get memory address.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_src32_0:
|
||||
.. _amdgpu_synid_gfx10_src:
|
||||
|
||||
src
|
||||
===========================
|
||||
===
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,13 +5,13 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_src32_5:
|
||||
.. _amdgpu_synid_gfx10_src_1:
|
||||
|
||||
src
|
||||
===========================
|
||||
===
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`literal<amdgpu_synid_literal>`
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`ival<amdgpu_synid_ival>`
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid1011_src32_0:
|
||||
.. _amdgpu_synid_gfx10_src_2:
|
||||
|
||||
src
|
||||
===========================
|
||||
===
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_src64_0:
|
||||
.. _amdgpu_synid_gfx10_src_3:
|
||||
|
||||
src
|
||||
===========================
|
||||
===
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,13 +5,13 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid1011_src32_2:
|
||||
.. _amdgpu_synid_gfx10_src_4:
|
||||
|
||||
src
|
||||
===========================
|
||||
===
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`literal<amdgpu_synid_literal>`
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`ival<amdgpu_synid_ival>`, :ref:`literal<amdgpu_synid_literal>`
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid7_vsrc32_1:
|
||||
.. _amdgpu_synid_gfx10_src_5:
|
||||
|
||||
vsrc
|
||||
===========================
|
||||
src
|
||||
===
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid1011_src32_1:
|
||||
.. _amdgpu_synid_gfx10_src_6:
|
||||
|
||||
src
|
||||
===========================
|
||||
===
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_src32_6:
|
||||
.. _amdgpu_synid_gfx10_src_7:
|
||||
|
||||
src
|
||||
===========================
|
||||
===
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,13 +5,13 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid1011_src32_3:
|
||||
.. _amdgpu_synid_gfx10_src_8:
|
||||
|
||||
src
|
||||
===========================
|
||||
===
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`literal<amdgpu_synid_literal>`
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`ival<amdgpu_synid_ival>`, :ref:`literal<amdgpu_synid_literal>`
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_rsrc_mimg:
|
||||
.. _amdgpu_synid_gfx10_srsrc:
|
||||
|
||||
srsrc
|
||||
===========================
|
||||
=====
|
||||
|
||||
Image resource constant which defines the location of the image buffer in memory, its dimensions, tiling, and data format.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_rsrc_buf:
|
||||
.. _amdgpu_synid_gfx10_srsrc_1:
|
||||
|
||||
srsrc
|
||||
===========================
|
||||
=====
|
||||
|
||||
Buffer resource constant which defines the address and characteristics of the buffer in memory.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_samp_mimg:
|
||||
.. _amdgpu_synid_gfx10_ssamp:
|
||||
|
||||
ssamp
|
||||
===========================
|
||||
=====
|
||||
|
||||
Sampler constant used to specify filtering options applied to the image data after it is read.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_ssrc32_0:
|
||||
.. _amdgpu_synid_gfx10_ssrc:
|
||||
|
||||
ssrc
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_ssrc64_0:
|
||||
.. _amdgpu_synid_gfx10_ssrc_1:
|
||||
|
||||
ssrc
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_ssrc32_1:
|
||||
.. _amdgpu_synid_gfx10_ssrc_2:
|
||||
|
||||
ssrc
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_ssrc64_1:
|
||||
.. _amdgpu_synid_gfx10_ssrc_3:
|
||||
|
||||
ssrc
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_ssrc32_2:
|
||||
.. _amdgpu_synid_gfx10_ssrc_4:
|
||||
|
||||
ssrc
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_wssrc:
|
||||
.. _amdgpu_synid_gfx10_ssrc_5:
|
||||
|
||||
ssrc
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_ssrc32_3:
|
||||
.. _amdgpu_synid_gfx10_ssrc_6:
|
||||
|
||||
ssrc
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_ssrc32_4:
|
||||
.. _amdgpu_synid_gfx10_ssrc_7:
|
||||
|
||||
ssrc
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_ssrc32_5:
|
||||
.. _amdgpu_synid_gfx10_ssrc_8:
|
||||
|
||||
ssrc
|
||||
===========================
|
||||
====
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_tgt:
|
||||
.. _amdgpu_synid_gfx10_tgt:
|
||||
|
||||
tgt
|
||||
===========================
|
||||
===
|
||||
|
||||
An export target:
|
||||
|
||||
|
|
|
|||
|
|
@ -5,9 +5,9 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid7_type_dev:
|
||||
.. _amdgpu_synid_gfx10_type_deviation:
|
||||
|
||||
Type deviation
|
||||
===========================
|
||||
Type Deviation
|
||||
==============
|
||||
|
||||
*Type* of this operand differs from *type* :ref:`implied by the opcode<amdgpu_syn_instruction_type>`. This tag specifies actual operand *type*.
|
||||
*Type* of this operand differs from *type* :ref:`implied by the opcode<amdgpu_syn_instruction_mnemo>`. This tag specifies actual operand *type*.
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid7_addr_ds:
|
||||
.. _amdgpu_synid_gfx10_vaddr:
|
||||
|
||||
vaddr
|
||||
===========================
|
||||
=====
|
||||
|
||||
An offset from the start of GDS/LDS memory.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid7_addr_flat:
|
||||
.. _amdgpu_synid_gfx10_vaddr_1:
|
||||
|
||||
vaddr
|
||||
===========================
|
||||
=====
|
||||
|
||||
A 64-bit flat address.
|
||||
|
||||
|
|
@ -0,0 +1,20 @@
|
|||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid_gfx10_vaddr_2:
|
||||
|
||||
vaddr
|
||||
=====
|
||||
|
||||
A 64-bit flat global address or a 32-bit offset depending on addressing mode:
|
||||
|
||||
* Address = :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>` + :ref:`offset12s<amdgpu_synid_flat_offset12s>`. :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>` is a 64-bit address. This mode is indicated by :ref:`saddr<amdgpu_synid_gfx10_saddr>` set to :ref:`off<amdgpu_synid_off>`.
|
||||
* Address = :ref:`saddr<amdgpu_synid_gfx10_saddr>` + :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>` + :ref:`offset12s<amdgpu_synid_flat_offset12s>`. :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>` is a 32-bit offset. This mode is used when :ref:`saddr<amdgpu_synid_gfx10_saddr>` is not :ref:`off<amdgpu_synid_off>`.
|
||||
|
||||
*Size:* 1 or 2 dwords.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
|
|
@ -5,14 +5,14 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vaddr_flat_scratch:
|
||||
.. _amdgpu_synid_gfx10_vaddr_3:
|
||||
|
||||
vaddr
|
||||
===========================
|
||||
=====
|
||||
|
||||
An optional 32-bit flat scratch offset. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
|
||||
|
||||
Either this operand or :ref:`saddr<amdgpu_synid10_saddr_flat_scratch>` must be set to :ref:`off<amdgpu_synid_off>`.
|
||||
Either this operand or :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` must be set to :ref:`off<amdgpu_synid_off>`.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_addr_mimg:
|
||||
.. _amdgpu_synid_gfx10_vaddr_4:
|
||||
|
||||
vaddr
|
||||
===========================
|
||||
=====
|
||||
|
||||
Image address which includes from one to four dimensional coordinates and other data used to locate a position in the image.
|
||||
|
||||
|
|
@ -19,5 +19,4 @@ This operand may be specified using either :ref:`standard VGPR syntax<amdgpu_syn
|
|||
* If specified using :ref:`NSA VGPR syntax<amdgpu_synid_nsa>`, the size is 1-13 dwords.
|
||||
* If specified using :ref:`standard VGPR syntax<amdgpu_synid_v>`, the size is 1, 2, 3, 4, 8 or 16 dwords. Note that assembler currently supports a limited range of register sequences.
|
||||
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_addr_buf:
|
||||
.. _amdgpu_synid_gfx10_vaddr_5:
|
||||
|
||||
vaddr
|
||||
===========================
|
||||
=====
|
||||
|
||||
This is an optional operand which may specify offset and/or index.
|
||||
|
||||
|
|
@ -1,20 +0,0 @@
|
|||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vaddr_flat_global:
|
||||
|
||||
vaddr
|
||||
===========================
|
||||
|
||||
A 64-bit flat global address or a 32-bit offset depending on addressing mode:
|
||||
|
||||
* Address = :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>` + :ref:`offset12s<amdgpu_synid_flat_offset12s>`. :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>` is a 64-bit address. This mode is indicated by :ref:`saddr<amdgpu_synid10_saddr_flat_global>` set to :ref:`off<amdgpu_synid_off>`.
|
||||
* Address = :ref:`saddr<amdgpu_synid10_saddr_flat_global>` + :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>` + :ref:`offset12s<amdgpu_synid_flat_offset12s>`. :ref:`vaddr<amdgpu_synid10_vaddr_flat_global>` is a 32-bit offset. This mode is used when :ref:`saddr<amdgpu_synid10_saddr_flat_global>` is not :ref:`off<amdgpu_synid_off>`.
|
||||
|
||||
*Size:* 1 or 2 dwords.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid10_vcc_32:
|
||||
.. _amdgpu_synid_gfx10_vcc:
|
||||
|
||||
vcc
|
||||
===========================
|
||||
===
|
||||
|
||||
Vector condition code. This operand depends on wavefront size:
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_vdata32_0:
|
||||
.. _amdgpu_synid_gfx10_vdata:
|
||||
|
||||
vdata
|
||||
===========================
|
||||
=====
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid_gfx10_vdata0:
|
||||
|
||||
vdata0
|
||||
======
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid_gfx10_vdata0_1:
|
||||
|
||||
vdata0
|
||||
======
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid_gfx10_vdata1:
|
||||
|
||||
vdata1
|
||||
======
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 1 dword.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
..
|
||||
**************************************************
|
||||
* *
|
||||
* Automatically generated file, do not edit! *
|
||||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid_gfx10_vdata1_1:
|
||||
|
||||
vdata1
|
||||
======
|
||||
|
||||
Instruction input.
|
||||
|
||||
*Size:* 2 dwords.
|
||||
|
||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid7_vdata64_0:
|
||||
.. _amdgpu_synid_gfx10_vdata_1:
|
||||
|
||||
vdata
|
||||
===========================
|
||||
=====
|
||||
|
||||
Instruction input.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_data_buf_atomic128:
|
||||
.. _amdgpu_synid_gfx10_vdata_10:
|
||||
|
||||
vdata
|
||||
===========================
|
||||
=====
|
||||
|
||||
Input data for an atomic instruction.
|
||||
|
||||
|
|
@ -5,10 +5,10 @@
|
|||
* *
|
||||
**************************************************
|
||||
|
||||
.. _amdgpu_synid8_vdata128_0:
|
||||
.. _amdgpu_synid_gfx10_vdata_2:
|
||||
|
||||
vdata
|
||||
===========================
|
||||
=====
|
||||
|
||||
Instruction input.
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue