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Nuke old code. Missed in last commit. 

llvm-svn: 146590
This commit is contained in:
Jim Grosbach 2011-12-14 21:41:32 +00:00
parent c984bf8fb0
commit 8e987f5e25
1 changed files with 0 additions and 14 deletions
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14
llvm/lib/Target/ARM/ARMInstrNEON.td
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@ -1523,13 +1523,6 @@ def VST2q16Pseudo : VSTQQPseudo<IIC_VST2x2>;
def VST2q32Pseudo : VSTQQPseudo<IIC_VST2x2>; def VST2q32Pseudo : VSTQQPseudo<IIC_VST2x2>;
// ...with address register writeback: // ...with address register writeback:
//class VST2DWB<bits<4> op11_8, bits<4> op7_4, string Dt, RegisterOperand VdTy>
// : NLdSt<0, 0b00, op11_8, op7_4, (outs GPR:$wb),
// (ins addrmode6:$Rn, am6offset:$Rm, VdTy:$Vd),
// IIC_VST2u, "vst2", Dt, "$Vd, $Rn$Rm", "$Rn.addr = $wb", []> {
// let Inst{5-4} = Rn{5-4};
// let DecoderMethod = "DecodeVSTInstruction";
//}
multiclass VST2DWB<bits<4> op11_8, bits<4> op7_4, string Dt, multiclass VST2DWB<bits<4> op11_8, bits<4> op7_4, string Dt,
RegisterOperand VdTy> { RegisterOperand VdTy> {
def _fixed : NLdSt<0, 0b00, op11_8, op7_4, (outs GPR:$wb), def _fixed : NLdSt<0, 0b00, op11_8, op7_4, (outs GPR:$wb),
@ -1550,13 +1543,6 @@ multiclass VST2DWB<bits<4> op11_8, bits<4> op7_4, string Dt,
let AsmMatchConverter = "cvtVSTwbRegister"; let AsmMatchConverter = "cvtVSTwbRegister";
} }
} }
//class VST2QWB<bits<4> op7_4, string Dt>
// : NLdSt<0, 0b00, 0b0011, op7_4, (outs GPR:$wb),
// (ins addrmode6:$Rn, am6offset:$Rm, VecListFourD:$Vd), IIC_VST2x2u,
// "vst2", Dt, "$Vd, $Rn$Rm", "$Rn.addr = $wb", []> {
// let Inst{5-4} = Rn{5-4};
// let DecoderMethod = "DecodeVSTInstruction";
//}
multiclass VST2QWB<bits<4> op7_4, string Dt> { multiclass VST2QWB<bits<4> op7_4, string Dt> {
def _fixed : NLdSt<0, 0b00, 0b0011, op7_4, (outs GPR:$wb), def _fixed : NLdSt<0, 0b00, 0b0011, op7_4, (outs GPR:$wb),
(ins addrmode6:$Rn, VecListFourD:$Vd), IIC_VLD1u, (ins addrmode6:$Rn, VecListFourD:$Vd), IIC_VLD1u,