[foldMemoryOperand()] Pass LiveIntervals to enable liveness check.
SystemZ (and probably other targets as well) can fold a memory operand by changing the opcode into a new instruction that as a side-effect also clobbers the CC-reg. In order to do this, liveness of that reg must first be checked. When LIS is passed, getRegUnit() can be called on it and the right LiveRange is computed on demand. Reviewed by Matthias Braun. http://reviews.llvm.org/D19861 llvm-svn: 269026
This commit is contained in:
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ebc7135f8e
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8e5b0c65cc
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@ -21,6 +21,7 @@
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/Support/BranchProbability.h"
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#include "llvm/Support/BranchProbability.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/CodeGen/LiveIntervalAnalysis.h"
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namespace llvm {
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namespace llvm {
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@ -799,13 +800,15 @@ public:
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/// The new instruction is inserted before MI, and the client is responsible
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/// The new instruction is inserted before MI, and the client is responsible
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/// for removing the old instruction.
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/// for removing the old instruction.
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MachineInstr *foldMemoryOperand(MachineBasicBlock::iterator MI,
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MachineInstr *foldMemoryOperand(MachineBasicBlock::iterator MI,
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ArrayRef<unsigned> Ops, int FrameIndex) const;
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ArrayRef<unsigned> Ops, int FrameIndex,
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LiveIntervals *LIS = nullptr) const;
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/// Same as the previous version except it allows folding of any load and
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/// Same as the previous version except it allows folding of any load and
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/// store from / to any address, not just from a specific stack slot.
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/// store from / to any address, not just from a specific stack slot.
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MachineInstr *foldMemoryOperand(MachineBasicBlock::iterator MI,
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MachineInstr *foldMemoryOperand(MachineBasicBlock::iterator MI,
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ArrayRef<unsigned> Ops,
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ArrayRef<unsigned> Ops,
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MachineInstr *LoadMI) const;
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MachineInstr *LoadMI,
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LiveIntervals *LIS = nullptr) const;
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/// Return true when there is potentially a faster code sequence
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/// Return true when there is potentially a faster code sequence
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/// for an instruction chain ending in \p Root. All potential patterns are
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/// for an instruction chain ending in \p Root. All potential patterns are
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@ -884,7 +887,8 @@ protected:
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/// at InsertPt.
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/// at InsertPt.
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virtual MachineInstr *foldMemoryOperandImpl(
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virtual MachineInstr *foldMemoryOperandImpl(
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MachineFunction &MF, MachineInstr *MI, ArrayRef<unsigned> Ops,
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MachineFunction &MF, MachineInstr *MI, ArrayRef<unsigned> Ops,
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MachineBasicBlock::iterator InsertPt, int FrameIndex) const {
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MachineBasicBlock::iterator InsertPt, int FrameIndex,
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LiveIntervals *LIS = nullptr) const {
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return nullptr;
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return nullptr;
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}
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}
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@ -895,7 +899,8 @@ protected:
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/// at InsertPt.
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/// at InsertPt.
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virtual MachineInstr *foldMemoryOperandImpl(
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virtual MachineInstr *foldMemoryOperandImpl(
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MachineFunction &MF, MachineInstr *MI, ArrayRef<unsigned> Ops,
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MachineFunction &MF, MachineInstr *MI, ArrayRef<unsigned> Ops,
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MachineBasicBlock::iterator InsertPt, MachineInstr *LoadMI) const {
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MachineBasicBlock::iterator InsertPt, MachineInstr *LoadMI,
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LiveIntervals *LIS = nullptr) const {
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return nullptr;
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return nullptr;
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}
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}
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@ -761,8 +761,8 @@ foldMemoryOperand(ArrayRef<std::pair<MachineInstr*, unsigned> > Ops,
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MachineInstrSpan MIS(MI);
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MachineInstrSpan MIS(MI);
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MachineInstr *FoldMI =
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MachineInstr *FoldMI =
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LoadMI ? TII.foldMemoryOperand(MI, FoldOps, LoadMI)
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LoadMI ? TII.foldMemoryOperand(MI, FoldOps, LoadMI, &LIS)
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: TII.foldMemoryOperand(MI, FoldOps, StackSlot);
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: TII.foldMemoryOperand(MI, FoldOps, StackSlot, &LIS);
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if (!FoldMI)
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if (!FoldMI)
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return false;
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return false;
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@ -205,7 +205,7 @@ bool LiveRangeEdit::foldAsLoad(LiveInterval *LI,
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if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second)
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if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second)
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return false;
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return false;
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MachineInstr *FoldMI = TII.foldMemoryOperand(UseMI, Ops, DefMI);
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MachineInstr *FoldMI = TII.foldMemoryOperand(UseMI, Ops, DefMI, &LIS);
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if (!FoldMI)
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if (!FoldMI)
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return false;
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return false;
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DEBUG(dbgs() << " folded: " << *FoldMI);
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DEBUG(dbgs() << " folded: " << *FoldMI);
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@ -497,7 +497,8 @@ static MachineInstr *foldPatchpoint(MachineFunction &MF, MachineInstr *MI,
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/// stream.
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/// stream.
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MachineInstr *TargetInstrInfo::foldMemoryOperand(MachineBasicBlock::iterator MI,
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MachineInstr *TargetInstrInfo::foldMemoryOperand(MachineBasicBlock::iterator MI,
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ArrayRef<unsigned> Ops,
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ArrayRef<unsigned> Ops,
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int FI) const {
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int FI,
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LiveIntervals *LIS) const {
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unsigned Flags = 0;
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unsigned Flags = 0;
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for (unsigned i = 0, e = Ops.size(); i != e; ++i)
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for (unsigned i = 0, e = Ops.size(); i != e; ++i)
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if (MI->getOperand(Ops[i]).isDef())
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if (MI->getOperand(Ops[i]).isDef())
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@ -519,7 +520,7 @@ MachineInstr *TargetInstrInfo::foldMemoryOperand(MachineBasicBlock::iterator MI,
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MBB->insert(MI, NewMI);
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MBB->insert(MI, NewMI);
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} else {
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} else {
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// Ask the target to do the actual folding.
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// Ask the target to do the actual folding.
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NewMI = foldMemoryOperandImpl(MF, MI, Ops, MI, FI);
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NewMI = foldMemoryOperandImpl(MF, MI, Ops, MI, FI, LIS);
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}
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}
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if (NewMI) {
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if (NewMI) {
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@ -778,7 +779,8 @@ void TargetInstrInfo::genAlternativeCodeSequence(
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/// stack slot.
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/// stack slot.
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MachineInstr *TargetInstrInfo::foldMemoryOperand(MachineBasicBlock::iterator MI,
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MachineInstr *TargetInstrInfo::foldMemoryOperand(MachineBasicBlock::iterator MI,
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ArrayRef<unsigned> Ops,
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ArrayRef<unsigned> Ops,
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MachineInstr *LoadMI) const {
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MachineInstr *LoadMI,
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LiveIntervals *LIS) const {
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assert(LoadMI->canFoldAsLoad() && "LoadMI isn't foldable!");
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assert(LoadMI->canFoldAsLoad() && "LoadMI isn't foldable!");
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#ifndef NDEBUG
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#ifndef NDEBUG
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for (unsigned i = 0, e = Ops.size(); i != e; ++i)
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for (unsigned i = 0, e = Ops.size(); i != e; ++i)
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NewMI = MBB.insert(MI, NewMI);
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NewMI = MBB.insert(MI, NewMI);
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} else {
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} else {
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// Ask the target to do the actual folding.
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// Ask the target to do the actual folding.
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NewMI = foldMemoryOperandImpl(MF, MI, Ops, MI, LoadMI);
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NewMI = foldMemoryOperandImpl(MF, MI, Ops, MI, LoadMI, LIS);
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}
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}
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if (!NewMI) return nullptr;
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if (!NewMI) return nullptr;
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@ -2448,7 +2448,8 @@ void llvm::emitFrameOffset(MachineBasicBlock &MBB,
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MachineInstr *AArch64InstrInfo::foldMemoryOperandImpl(
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MachineInstr *AArch64InstrInfo::foldMemoryOperandImpl(
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MachineFunction &MF, MachineInstr *MI, ArrayRef<unsigned> Ops,
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MachineFunction &MF, MachineInstr *MI, ArrayRef<unsigned> Ops,
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MachineBasicBlock::iterator InsertPt, int FrameIndex) const {
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MachineBasicBlock::iterator InsertPt, int FrameIndex,
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LiveIntervals *LIS) const {
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// This is a bit of a hack. Consider this instruction:
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// This is a bit of a hack. Consider this instruction:
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//
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//
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// %vreg0<def> = COPY %SP; GPR64all:%vreg0
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// %vreg0<def> = COPY %SP; GPR64all:%vreg0
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MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
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MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
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ArrayRef<unsigned> Ops,
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ArrayRef<unsigned> Ops,
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MachineBasicBlock::iterator InsertPt,
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MachineBasicBlock::iterator InsertPt,
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int FrameIndex) const override;
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int FrameIndex,
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LiveIntervals *LIS = nullptr) const override;
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bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
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bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
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MachineBasicBlock *&FBB,
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MachineBasicBlock *&FBB,
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@ -15,6 +15,7 @@
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#include "SystemZInstrBuilder.h"
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#include "SystemZInstrBuilder.h"
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#include "SystemZTargetMachine.h"
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#include "SystemZTargetMachine.h"
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#include "llvm/CodeGen/LiveVariables.h"
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#include "llvm/CodeGen/LiveVariables.h"
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#include "llvm/CodeGen/LiveIntervalAnalysis.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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using namespace llvm;
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using namespace llvm;
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@ -846,18 +847,28 @@ SystemZInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
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MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl(
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MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl(
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MachineFunction &MF, MachineInstr *MI, ArrayRef<unsigned> Ops,
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MachineFunction &MF, MachineInstr *MI, ArrayRef<unsigned> Ops,
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MachineBasicBlock::iterator InsertPt, int FrameIndex) const {
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MachineBasicBlock::iterator InsertPt, int FrameIndex,
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LiveIntervals *LIS) const {
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const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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unsigned Size = MFI->getObjectSize(FrameIndex);
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unsigned Size = MFI->getObjectSize(FrameIndex);
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unsigned Opcode = MI->getOpcode();
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unsigned Opcode = MI->getOpcode();
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// XXX This is an introduction of a CC def and is illegal! Reactivate
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// with a check of liveness of CC reg.
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#if 0
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if (Ops.size() == 2 && Ops[0] == 0 && Ops[1] == 1) {
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if (Ops.size() == 2 && Ops[0] == 0 && Ops[1] == 1) {
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if ((Opcode == SystemZ::LA || Opcode == SystemZ::LAY) &&
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if (LIS != nullptr &&
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(Opcode == SystemZ::LA || Opcode == SystemZ::LAY) &&
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isInt<8>(MI->getOperand(2).getImm()) &&
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isInt<8>(MI->getOperand(2).getImm()) &&
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!MI->getOperand(3).getReg()) {
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!MI->getOperand(3).getReg()) {
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// Check CC liveness, since new instruction introduces a dead
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// def of CC.
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MCRegUnitIterator CCUnit(SystemZ::CC, TRI);
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LiveRange &CCLiveRange = LIS->getRegUnit(*CCUnit);
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++CCUnit;
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assert (!CCUnit.isValid() && "CC only has one reg unit.");
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SlotIndex MISlot =
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LIS->getSlotIndexes()->getInstructionIndex(*MI).getRegSlot();
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if (!CCLiveRange.liveAt(MISlot)) {
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// LA(Y) %reg, CONST(%reg) -> AGSI %mem, CONST
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// LA(Y) %reg, CONST(%reg) -> AGSI %mem, CONST
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MachineInstr *BuiltMI =
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MachineInstr *BuiltMI =
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BuildMI(*InsertPt->getParent(), InsertPt, MI->getDebugLoc(),
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BuildMI(*InsertPt->getParent(), InsertPt, MI->getDebugLoc(),
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.addImm(0)
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.addImm(0)
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.addImm(MI->getOperand(2).getImm());
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.addImm(MI->getOperand(2).getImm());
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BuiltMI->findRegisterDefOperand(SystemZ::CC)->setIsDead(true);
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BuiltMI->findRegisterDefOperand(SystemZ::CC)->setIsDead(true);
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CCLiveRange.createDeadDef(MISlot, LIS->getVNInfoAllocator());
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return BuiltMI;
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return BuiltMI;
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}
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}
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}
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return nullptr;
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return nullptr;
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}
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}
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#endif
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// All other cases require a single operand.
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// All other cases require a single operand.
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if (Ops.size() != 1)
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if (Ops.size() != 1)
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MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl(
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MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl(
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MachineFunction &MF, MachineInstr *MI, ArrayRef<unsigned> Ops,
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MachineFunction &MF, MachineInstr *MI, ArrayRef<unsigned> Ops,
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MachineBasicBlock::iterator InsertPt, MachineInstr *LoadMI) const {
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MachineBasicBlock::iterator InsertPt, MachineInstr *LoadMI,
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LiveIntervals *LIS) const {
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return nullptr;
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return nullptr;
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}
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}
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MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
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MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
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ArrayRef<unsigned> Ops,
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ArrayRef<unsigned> Ops,
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MachineBasicBlock::iterator InsertPt,
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MachineBasicBlock::iterator InsertPt,
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int FrameIndex) const override;
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int FrameIndex,
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LiveIntervals *LIS = nullptr) const override;
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MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
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MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
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ArrayRef<unsigned> Ops,
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ArrayRef<unsigned> Ops,
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MachineBasicBlock::iterator InsertPt,
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MachineBasicBlock::iterator InsertPt,
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MachineInstr *LoadMI) const override;
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MachineInstr *LoadMI,
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LiveIntervals *LIS = nullptr) const override;
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bool expandPostRAPseudo(MachineBasicBlock::iterator MBBI) const override;
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bool expandPostRAPseudo(MachineBasicBlock::iterator MBBI) const override;
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bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const
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bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const
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override;
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override;
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MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
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MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
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MachineFunction &MF, MachineInstr *MI, ArrayRef<unsigned> Ops,
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MachineFunction &MF, MachineInstr *MI, ArrayRef<unsigned> Ops,
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MachineBasicBlock::iterator InsertPt, int FrameIndex) const {
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MachineBasicBlock::iterator InsertPt, int FrameIndex,
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LiveIntervals *LIS) const {
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// Check switch flag
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// Check switch flag
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if (NoFusing)
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if (NoFusing)
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return nullptr;
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return nullptr;
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MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
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MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
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MachineFunction &MF, MachineInstr *MI, ArrayRef<unsigned> Ops,
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MachineFunction &MF, MachineInstr *MI, ArrayRef<unsigned> Ops,
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MachineBasicBlock::iterator InsertPt, MachineInstr *LoadMI) const {
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MachineBasicBlock::iterator InsertPt, MachineInstr *LoadMI,
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LiveIntervals *LIS) const {
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// If loading from a FrameIndex, fold directly from the FrameIndex.
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// If loading from a FrameIndex, fold directly from the FrameIndex.
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unsigned NumOps = LoadMI->getDesc().getNumOperands();
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unsigned NumOps = LoadMI->getDesc().getNumOperands();
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int FrameIndex;
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int FrameIndex;
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if (isLoadFromStackSlot(LoadMI, FrameIndex)) {
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if (isLoadFromStackSlot(LoadMI, FrameIndex)) {
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if (isNonFoldablePartialRegisterLoad(*LoadMI, *MI, MF))
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if (isNonFoldablePartialRegisterLoad(*LoadMI, *MI, MF))
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return nullptr;
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return nullptr;
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return foldMemoryOperandImpl(MF, MI, Ops, InsertPt, FrameIndex);
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return foldMemoryOperandImpl(MF, MI, Ops, InsertPt, FrameIndex, LIS);
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}
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}
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// Check switch flag
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// Check switch flag
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MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
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MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
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ArrayRef<unsigned> Ops,
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ArrayRef<unsigned> Ops,
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MachineBasicBlock::iterator InsertPt,
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MachineBasicBlock::iterator InsertPt,
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int FrameIndex) const override;
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int FrameIndex,
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LiveIntervals *LIS = nullptr) const override;
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/// foldMemoryOperand - Same as the previous version except it allows folding
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/// foldMemoryOperand - Same as the previous version except it allows folding
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/// of any load and store from / to any address, not just from a specific
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/// of any load and store from / to any address, not just from a specific
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MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
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MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
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ArrayRef<unsigned> Ops,
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ArrayRef<unsigned> Ops,
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MachineBasicBlock::iterator InsertPt,
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MachineBasicBlock::iterator InsertPt,
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MachineInstr *LoadMI) const override;
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MachineInstr *LoadMI,
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LiveIntervals *LIS = nullptr) const override;
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/// unfoldMemoryOperand - Separate a single instruction which folded a load or
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/// unfoldMemoryOperand - Separate a single instruction which folded a load or
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/// a store or a load and a store into two or more instruction. If this is
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/// a store or a load and a store into two or more instruction. If this is
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; Check that adding 127 to a spilled value can use AGSI.
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; Check that adding 127 to a spilled value can use AGSI.
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define void @f11(i64 *%ptr, i32 %sel) {
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define void @f11(i64 *%ptr, i32 %sel) {
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; CHECK-LABEL: f11:
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; CHECK-LABEL: f11:
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; _CHECK: agsi {{[0-9]+}}(%r15), 127
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; CHECK: agsi {{[0-9]+}}(%r15), 127
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; CHECK: br %r14
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; CHECK: br %r14
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entry:
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entry:
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%val0 = load volatile i64 , i64 *%ptr
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%val0 = load volatile i64 , i64 *%ptr
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