gas accepts xchg <mem>, <reg> as a synonym for xchg <reg>, <mem>.
Add this to the mc assembler, fixing PR8061 llvm-svn: 113346
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@ -753,6 +753,7 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
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PatchedName = "vpclmulqdq";
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PatchedName = "vpclmulqdq";
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}
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}
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}
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}
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Operands.push_back(X86Operand::CreateToken(PatchedName, NameLoc));
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Operands.push_back(X86Operand::CreateToken(PatchedName, NameLoc));
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if (ExtraImmOp)
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if (ExtraImmOp)
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@ -828,6 +829,16 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
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Operands[0] = X86Operand::CreateToken("sldtw", NameLoc);
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Operands[0] = X86Operand::CreateToken("sldtw", NameLoc);
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}
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}
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// The assembler accepts "xchgX <reg>, <mem>" and "xchgX <mem>, <reg>" as
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// synonyms. Our tables only have the "<reg>, <mem>" form, so if we see the
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// other operand order, swap them.
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if (Name == "xchgb" || Name == "xchgw" || Name == "xchgl" || Name == "xchgq")
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if (Operands.size() == 3 &&
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static_cast<X86Operand*>(Operands[1])->isMem() &&
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static_cast<X86Operand*>(Operands[2])->isReg()) {
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std::swap(Operands[1], Operands[2]);
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}
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return false;
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return false;
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}
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}
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@ -168,3 +168,8 @@ L1:
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// CHECK: jrcxz L1
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// CHECK: jrcxz L1
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// CHECK: encoding: [0xe3,A]
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// CHECK: encoding: [0xe3,A]
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// PR8061
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xchgl 368(%rax),%ecx
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// CHECK: xchgl %ecx, 368(%rax)
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xchgl %ecx, 368(%rax)
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// CHECK: xchgl %ecx, 368(%rax)
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