replica
/
hanchenye-llvm-project
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Clean up. 

llvm-svn: 32027
This commit is contained in:
Evan Cheng 2006-11-29 23:46:27 +00:00
parent 0b1692216d
commit 8c84c7cd0d
1 changed files with 8 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
View File

@ -643,10 +643,12 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM,
// For X86-64 PIC code, only allow GV / CP + displacement so we can use RIP // For X86-64 PIC code, only allow GV / CP + displacement so we can use RIP
// relative addressing mode. // relative addressing mode.
if ((!Subtarget->is64Bit() || TM.getCodeModel() == CodeModel::Small) && if (Subtarget->is64Bit() && TM.getCodeModel() != CodeModel::Small)
(!Available || (AM.Base.Reg.Val && AM.IndexReg.Val))) { break;
if (!Available || (AM.Base.Reg.Val && AM.IndexReg.Val)) {
bool isRIP = Subtarget->is64Bit(); bool isRIP = Subtarget->is64Bit();
if (isRIP && (AM.Base.Reg.Val || AM.Scale > 1 || AM.IndexReg.Val || if (isRIP &&
(AM.Base.Reg.Val || AM.Scale > 1 || AM.IndexReg.Val ||
AM.BaseType == X86ISelAddressMode::FrameIndexBase)) AM.BaseType == X86ISelAddressMode::FrameIndexBase))
break; break;
if (ConstantPoolSDNode *CP = if (ConstantPoolSDNode *CP =
@ -655,8 +657,7 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM,
AM.CP = CP->getConstVal(); AM.CP = CP->getConstVal();
AM.Align = CP->getAlignment(); AM.Align = CP->getAlignment();
AM.Disp += CP->getOffset(); AM.Disp += CP->getOffset();
if (isRIP) AM.isRIPRel = isRIP;
AM.isRIPRel = true;
return false; return false;
} }
} else if (GlobalAddressSDNode *G = } else if (GlobalAddressSDNode *G =
@ -664,8 +665,7 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM,
if (AM.GV == 0) { if (AM.GV == 0) {
AM.GV = G->getGlobal(); AM.GV = G->getGlobal();
AM.Disp += G->getOffset(); AM.Disp += G->getOffset();
if (isRIP) AM.isRIPRel = isRIP;
AM.isRIPRel = true;
return false; return false;
} }
} else if (isRoot && isRIP) { } else if (isRoot && isRIP) {