From 8c5f0c3115d3066bf35b5e0c2456356d8dbb6c07 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Wed, 8 Dec 2010 23:51:35 +0000 Subject: [PATCH] Properly deal with empty intervals when checking for interference. llvm-svn: 121319 --- llvm/lib/CodeGen/LiveIntervalUnion.cpp | 3 ++- llvm/lib/CodeGen/RegAllocGreedy.cpp | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/llvm/lib/CodeGen/LiveIntervalUnion.cpp b/llvm/lib/CodeGen/LiveIntervalUnion.cpp index bedf22b5bad8..4b9a2d302c09 100644 --- a/llvm/lib/CodeGen/LiveIntervalUnion.cpp +++ b/llvm/lib/CodeGen/LiveIntervalUnion.cpp @@ -111,9 +111,10 @@ void LiveIntervalUnion::verify(LiveVirtRegBitSet& VisitedVRegs) { // Assumes that segments are sorted by start position in both // LiveInterval and LiveSegments. void LiveIntervalUnion::Query::findIntersection(InterferenceResult &IR) const { - // Search until reaching the end of the LiveUnion segments. LiveInterval::iterator VirtRegEnd = VirtReg->end(); + if (IR.VirtRegI == VirtRegEnd) + return; while (IR.LiveUnionI.valid()) { // Slowly advance the live virtual reg iterator until we surpass the next // segment in LiveUnion. diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp index c88d474315e7..f69979bf2aaa 100644 --- a/llvm/lib/CodeGen/RegAllocGreedy.cpp +++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp @@ -173,6 +173,7 @@ unsigned RAGreedy::selectOrSplit(LiveInterval &VirtReg, // Found an available register. return PhysReg; } + assert(!VirtReg.empty() && "Empty VirtReg has interference"); LiveInterval *interferingVirtReg = Queries[interfReg].firstInterference().liveUnionPos().value();