[WebAssembly] Create new registers instead of reusing old ones in RegStackify.
This avoids some complications updating LiveIntervals to be aware of the new register lifetimes, because we can just compute new intervals from scratch rather than describe how the old ones have been changed. llvm-svn: 260971
This commit is contained in:
Dan Gohman
parent
944f655e05
commit
8aa237c3ca
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@ -237,13 +237,13 @@ RematerializeCheapDef(unsigned Reg, MachineOperand &Op, MachineInstr *Def,
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///
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/// to this:
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///
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/// Reg = INST ... // Def (to become the new Insert)
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/// TeeReg, NewReg = TEE_LOCAL_... Reg
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/// DefReg = INST ... // Def (to become the new Insert)
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/// TeeReg, NewReg = TEE_LOCAL_... DefReg
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/// INST ..., TeeReg, ... // Insert
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/// INST ..., NewReg, ...
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/// INST ..., NewReg, ...
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///
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/// with Reg and TeeReg stackified. This eliminates a get_local from the
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/// with DefReg and TeeReg stackified. This eliminates a get_local from the
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/// resulting code.
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static MachineInstr *MoveAndTeeForMultiUse(
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unsigned Reg, MachineOperand &Op, MachineInstr *Def, MachineBasicBlock &MBB,
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@ -254,18 +254,20 @@ static MachineInstr *MoveAndTeeForMultiUse(
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const auto *RegClass = MRI.getRegClass(Reg);
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unsigned NewReg = MRI.createVirtualRegister(RegClass);
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unsigned TeeReg = MRI.createVirtualRegister(RegClass);
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unsigned DefReg = MRI.createVirtualRegister(RegClass);
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MRI.replaceRegWith(Reg, NewReg);
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MachineInstr *Tee = BuildMI(MBB, Insert, Insert->getDebugLoc(),
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TII->get(GetTeeLocalOpcode(RegClass)), TeeReg)
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.addReg(NewReg, RegState::Define)
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.addReg(Reg);
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.addReg(DefReg);
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Op.setReg(TeeReg);
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Def->getOperand(0).setReg(Reg);
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Def->getOperand(0).setReg(DefReg);
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LIS.InsertMachineInstrInMaps(Tee);
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LIS.shrinkToUses(&LIS.getInterval(Reg));
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LIS.removeInterval(Reg);
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LIS.createAndComputeVirtRegInterval(NewReg);
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LIS.createAndComputeVirtRegInterval(TeeReg);
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MFI.stackifyVReg(Reg);
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LIS.createAndComputeVirtRegInterval(DefReg);
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MFI.stackifyVReg(DefReg);
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MFI.stackifyVReg(TeeReg);
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ImposeStackOrdering(Def);
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ImposeStackOrdering(Tee);
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@ -96,12 +96,12 @@ false:
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; CHECK-NEXT: .param i32, i32, i32{{$}}
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; CHECK-NEXT: .local i32{{$}}
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; CHECK-NEXT: block{{$}}
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; CHECK-NEXT: i32.load $push0=, 0($2){{$}}
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; CHECK-NEXT: tee_local $push3=, $3=, $pop0{{$}}
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; CHECK-NEXT: i32.ge_u $push1=, $pop3, $1{{$}}
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; CHECK-NEXT: br_if 0, $pop1{{$}}
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; CHECK-NEXT: i32.lt_u $push2=, $3, $0{{$}}
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; CHECK-NEXT: br_if 0, $pop2{{$}}
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; CHECK-NEXT: i32.load $push[[NUM0:[0-9]+]]=, 0($2){{$}}
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; CHECK-NEXT: tee_local $push[[NUM1:[0-9]+]]=, $3=, $pop[[NUM0]]{{$}}
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; CHECK-NEXT: i32.ge_u $push[[NUM2:[0-9]+]]=, $pop[[NUM1]], $1{{$}}
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; CHECK-NEXT: br_if 0, $pop[[NUM2]]{{$}}
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; CHECK-NEXT: i32.lt_u $push[[NUM3:[0-9]+]]=, $3, $0{{$}}
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; CHECK-NEXT: br_if 0, $pop[[NUM3]]{{$}}
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; CHECK-NEXT: i32.store $discard=, 0($2), $3{{$}}
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; CHECK-NEXT: .LBB5_3:
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; CHECK-NEXT: end_block{{$}}
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@ -193,9 +193,9 @@ entry:
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; CHECK-LABEL: simple_multiple_use:
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; CHECK-NEXT: .param i32, i32{{$}}
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; CHECK-NEXT: i32.mul $push0=, $1, $0{{$}}
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; CHECK-NEXT: tee_local $push1=, $0=, $pop0{{$}}
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; CHECK-NEXT: call use_a@FUNCTION, $pop1{{$}}
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; CHECK-NEXT: i32.mul $push[[NUM0:[0-9]+]]=, $1, $0{{$}}
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; CHECK-NEXT: tee_local $push[[NUM1:[0-9]+]]=, $0=, $pop[[NUM0]]{{$}}
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; CHECK-NEXT: call use_a@FUNCTION, $pop[[NUM1]]{{$}}
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; CHECK-NEXT: call use_b@FUNCTION, $0{{$}}
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; CHECK-NEXT: return{{$}}
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declare void @use_a(i32)
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@ -211,9 +211,9 @@ define void @simple_multiple_use(i32 %x, i32 %y) {
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; CHECK-LABEL: multiple_uses_in_same_insn:
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; CHECK-NEXT: .param i32, i32{{$}}
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; CHECK-NEXT: i32.mul $push0=, $1, $0{{$}}
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; CHECK-NEXT: tee_local $push1=, $0=, $pop0{{$}}
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; CHECK-NEXT: call use_2@FUNCTION, $pop1, $0{{$}}
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; CHECK-NEXT: i32.mul $push[[NUM0:[0-9]+]]=, $1, $0{{$}}
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; CHECK-NEXT: tee_local $push[[NUM1:[0-9]+]]=, $0=, $pop[[NUM0]]{{$}}
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; CHECK-NEXT: call use_2@FUNCTION, $pop[[NUM1]], $0{{$}}
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; CHECK-NEXT: return{{$}}
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declare void @use_2(i32, i32)
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define void @multiple_uses_in_same_insn(i32 %x, i32 %y) {
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@ -265,4 +265,47 @@ define i32 @no_stackify_past_use(i32 %arg) {
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ret i32 %tmp6
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}
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; Stackify individual defs of virtual registers with multiple defs.
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; CHECK-LABEL: multiple_defs:
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; CHECK: f64.add $push[[NUM0:[0-9]+]]=, ${{[0-9]+}}, $pop{{[0-9]+}}{{$}}
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; CHECK-NEXT: tee_local $push[[NUM1:[0-9]+]]=, $[[NUM2:[0-9]+]]=, $pop[[NUM0]]{{$}}
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; CHECK-NEXT: f64.select $push{{[0-9]+}}=, $pop{{[0-9]+}}, $pop[[NUM1]], ${{[0-9]+}}{{$}}
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; CHECK: $[[NUM2]]=,
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; CHECK: $[[NUM2]]=,
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define void @multiple_defs(i32 %arg, i32 %arg1, i1 %arg2, i1 %arg3, i1 %arg4) {
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bb:
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br label %bb5
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bb5: ; preds = %bb21, %bb
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%tmp = phi double [ 0.000000e+00, %bb ], [ %tmp22, %bb21 ]
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%tmp6 = phi double [ 0.000000e+00, %bb ], [ %tmp23, %bb21 ]
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%tmp7 = fcmp olt double %tmp6, 2.323450e+01
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br i1 %tmp7, label %bb8, label %bb21
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bb8: ; preds = %bb17, %bb5
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%tmp9 = phi double [ %tmp19, %bb17 ], [ %tmp, %bb5 ]
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%tmp10 = fadd double %tmp6, -1.000000e+00
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%tmp11 = select i1 %arg2, double -1.135357e+04, double %tmp10
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%tmp12 = fadd double %tmp11, %tmp9
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br i1 %arg3, label %bb17, label %bb13
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bb13: ; preds = %bb8
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%tmp14 = or i32 %arg1, 2
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%tmp15 = icmp eq i32 %tmp14, 14
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%tmp16 = select i1 %tmp15, double -1.135357e+04, double 0xBFCE147AE147B000
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br label %bb17
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bb17: ; preds = %bb13, %bb8
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%tmp18 = phi double [ %tmp16, %bb13 ], [ %tmp10, %bb8 ]
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%tmp19 = fadd double %tmp18, %tmp12
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%tmp20 = fcmp olt double %tmp6, 2.323450e+01
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br i1 %tmp20, label %bb8, label %bb21
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bb21: ; preds = %bb17, %bb5
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%tmp22 = phi double [ %tmp, %bb5 ], [ %tmp9, %bb17 ]
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%tmp23 = fadd double %tmp6, 1.000000e+00
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br label %bb5
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}
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!0 = !{}
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@ -53,13 +53,13 @@ entry:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: .local i32{{$}}
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; CHECK-NEXT: i32.load $push0=, 0($0){{$}}
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; CHECK-NEXT: tee_local $push4=, $1=, $pop0{{$}}
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; CHECK-NEXT: i32.const $push1=, 4{{$}}
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; CHECK-NEXT: i32.add $push2=, $pop4, $pop1{{$}}
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; CHECK-NEXT: i32.store $discard=, 0($0), $pop2{{$}}
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; CHECK-NEXT: i32.load $push3=, 0($1){{$}}
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; CHECK-NEXT: return $pop3{{$}}
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; CHECK-NEXT: i32.load $push[[NUM0:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: tee_local $push[[NUM1:[0-9]+]]=, $1=, $pop[[NUM0]]{{$}}
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; CHECK-NEXT: i32.const $push[[NUM2:[0-9]+]]=, 4{{$}}
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; CHECK-NEXT: i32.add $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}}
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; CHECK-NEXT: i32.store $discard=, 0($0), $pop[[NUM3]]{{$}}
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; CHECK-NEXT: i32.load $push[[NUM4:[0-9]+]]=, 0($1){{$}}
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; CHECK-NEXT: return $pop[[NUM4]]{{$}}
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define i8 @arg_i8(i8** %ap) {
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entry:
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%t = va_arg i8** %ap, i8
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@ -72,17 +72,17 @@ entry:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: .local i32{{$}}
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; CHECK-NEXT: i32.load $push0=, 0($0){{$}}
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; CHECK-NEXT: i32.const $push1=, 3{{$}}
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; CHECK-NEXT: i32.add $push2=, $pop0, $pop1{{$}}
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; CHECK-NEXT: i32.const $push3=, -4{{$}}
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; CHECK-NEXT: i32.and $push4=, $pop2, $pop3{{$}}
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; CHECK-NEXT: tee_local $push8=, $1=, $pop4{{$}}
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; CHECK-NEXT: i32.const $push5=, 4{{$}}
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; CHECK-NEXT: i32.add $push6=, $pop8, $pop5{{$}}
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; CHECK-NEXT: i32.store $discard=, 0($0), $pop6{{$}}
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; CHECK-NEXT: i32.load $push7=, 0($1){{$}}
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; CHECK-NEXT: return $pop7{{$}}
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; CHECK-NEXT: i32.load $push[[NUM0:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: i32.const $push[[NUM1:[0-9]+]]=, 3{{$}}
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; CHECK-NEXT: i32.add $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
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; CHECK-NEXT: i32.const $push[[NUM3:[0-9]+]]=, -4{{$}}
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; CHECK-NEXT: i32.and $push[[NUM4:[0-9]+]]=, $pop[[NUM2]], $pop[[NUM3]]{{$}}
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; CHECK-NEXT: tee_local $push[[NUM5:[0-9]+]]=, $1=, $pop[[NUM4]]{{$}}
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; CHECK-NEXT: i32.const $push[[NUM6:[0-9]+]]=, 4{{$}}
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; CHECK-NEXT: i32.add $push[[NUM7:[0-9]+]]=, $pop[[NUM5]], $pop[[NUM6]]{{$}}
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; CHECK-NEXT: i32.store $discard=, 0($0), $pop[[NUM7]]{{$}}
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; CHECK-NEXT: i32.load $push[[NUM8:[0-9]+]]=, 0($1){{$}}
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; CHECK-NEXT: return $pop[[NUM8]]{{$}}
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define i32 @arg_i32(i8** %ap) {
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entry:
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%t = va_arg i8** %ap, i32
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