[X86][AVX512VL] Added VSHUFPD/VSHUFPS intrinsics fast-isel generic IR tests
llvm-svn: 274533
This commit is contained in:
Simon Pilgrim
parent
7dac6fbdf8
commit
8a01915bd2
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@ -552,4 +552,278 @@ define <4 x double> @test_mm256_maskz_permutex_pd(i8 %a0, <4 x double> %a1) {
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ret <4 x double> %res1
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}
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define <2 x double> @test_mm_shuffle_pd(<2 x double> %a0, <2 x double> %a1) {
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; X32-LABEL: test_mm_shuffle_pd:
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; X32: # BB#0:
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; X32-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
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; X32-NEXT: retl
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;
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; X64-LABEL: test_mm_shuffle_pd:
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; X64: # BB#0:
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; X64-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
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; X64-NEXT: retq
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%res = shufflevector <2 x double> %a0, <2 x double> %a1, <2 x i32> <i32 1, i32 3>
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ret <2 x double> %res
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}
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define <2 x double> @test_mm_mask_shuffle_pd(<2 x double> %a0, i8 %a1, <2 x double> %a2, <2 x double> %a3) {
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; X32-LABEL: test_mm_mask_shuffle_pd:
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; X32: # BB#0:
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; X32-NEXT: pushl %eax
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; X32-NEXT: .Ltmp12:
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; X32-NEXT: .cfi_def_cfa_offset 8
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: andb $3, %al
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; X32-NEXT: movb %al, {{[0-9]+}}(%esp)
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; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: kmovw %eax, %k1
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; X32-NEXT: vunpckhpd {{.*#+}} xmm0 {%k1} = xmm1[1],xmm2[1]
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; X32-NEXT: popl %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test_mm_mask_shuffle_pd:
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; X64: # BB#0:
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; X64-NEXT: andb $3, %dil
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; X64-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: kmovw %eax, %k1
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; X64-NEXT: vunpckhpd {{.*#+}} xmm0 {%k1} = xmm1[1],xmm2[1]
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; X64-NEXT: retq
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%trn1 = trunc i8 %a1 to i2
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%arg1 = bitcast i2 %trn1 to <2 x i1>
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%res0 = shufflevector <2 x double> %a2, <2 x double> %a3, <2 x i32> <i32 1, i32 3>
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%res1 = select <2 x i1> %arg1, <2 x double> %res0, <2 x double> %a0
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ret <2 x double> %res1
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}
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define <2 x double> @test_mm_maskz_shuffle_pd(i8 %a0, <2 x double> %a1, <2 x double> %a2) {
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; X32-LABEL: test_mm_maskz_shuffle_pd:
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; X32: # BB#0:
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; X32-NEXT: pushl %eax
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; X32-NEXT: .Ltmp13:
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; X32-NEXT: .cfi_def_cfa_offset 8
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: andb $3, %al
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; X32-NEXT: movb %al, {{[0-9]+}}(%esp)
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; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: kmovw %eax, %k1
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; X32-NEXT: vunpckhpd {{.*#+}} xmm0 {%k1} {z} = xmm0[1],xmm1[1]
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; X32-NEXT: popl %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test_mm_maskz_shuffle_pd:
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; X64: # BB#0:
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; X64-NEXT: andb $3, %dil
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; X64-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: kmovw %eax, %k1
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; X64-NEXT: vunpckhpd {{.*#+}} xmm0 {%k1} {z} = xmm0[1],xmm1[1]
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; X64-NEXT: retq
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%trn1 = trunc i8 %a0 to i2
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%arg0 = bitcast i2 %trn1 to <2 x i1>
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%res0 = shufflevector <2 x double> %a1, <2 x double> %a2, <2 x i32> <i32 1, i32 3>
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%res1 = select <2 x i1> %arg0, <2 x double> %res0, <2 x double> zeroinitializer
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ret <2 x double> %res1
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}
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define <4 x double> @test_mm256_shuffle_pd(<4 x double> %a0, <4 x double> %a1) {
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; X32-LABEL: test_mm256_shuffle_pd:
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; X32: # BB#0:
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; X32-NEXT: vshufpd {{.*#+}} ymm0 = ymm0[1],ymm1[1],ymm0[2],ymm1[2]
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; X32-NEXT: retl
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;
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; X64-LABEL: test_mm256_shuffle_pd:
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; X64: # BB#0:
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; X64-NEXT: vshufpd {{.*#+}} ymm0 = ymm0[1],ymm1[1],ymm0[2],ymm1[2]
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; X64-NEXT: retq
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%res = shufflevector <4 x double> %a0, <4 x double> %a1, <4 x i32> <i32 1, i32 5, i32 2, i32 6>
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ret <4 x double> %res
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}
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define <4 x double> @test_mm256_mask_shuffle_pd(<4 x double> %a0, i8 %a1, <4 x double> %a2, <4 x double> %a3) {
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; X32-LABEL: test_mm256_mask_shuffle_pd:
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; X32: # BB#0:
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; X32-NEXT: pushl %eax
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; X32-NEXT: .Ltmp14:
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; X32-NEXT: .cfi_def_cfa_offset 8
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: andb $15, %al
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; X32-NEXT: movb %al, (%esp)
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; X32-NEXT: movzbl (%esp), %eax
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; X32-NEXT: kmovw %eax, %k1
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; X32-NEXT: vshufpd {{.*#+}} ymm0 {%k1} = ymm1[1],ymm2[1],ymm1[2],ymm2[2]
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; X32-NEXT: popl %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test_mm256_mask_shuffle_pd:
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; X64: # BB#0:
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; X64-NEXT: andb $15, %dil
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; X64-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: kmovw %eax, %k1
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; X64-NEXT: vshufpd {{.*#+}} ymm0 {%k1} = ymm1[1],ymm2[1],ymm1[2],ymm2[2]
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; X64-NEXT: retq
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%trn1 = trunc i8 %a1 to i4
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%arg1 = bitcast i4 %trn1 to <4 x i1>
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%res0 = shufflevector <4 x double> %a2, <4 x double> %a3, <4 x i32> <i32 1, i32 5, i32 2, i32 6>
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%res1 = select <4 x i1> %arg1, <4 x double> %res0, <4 x double> %a0
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ret <4 x double> %res1
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}
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define <4 x double> @test_mm256_maskz_shuffle_pd(i8 %a0, <4 x double> %a1, <4 x double> %a2) {
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; X32-LABEL: test_mm256_maskz_shuffle_pd:
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; X32: # BB#0:
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; X32-NEXT: pushl %eax
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; X32-NEXT: .Ltmp15:
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; X32-NEXT: .cfi_def_cfa_offset 8
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: andb $15, %al
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; X32-NEXT: movb %al, (%esp)
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; X32-NEXT: movzbl (%esp), %eax
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; X32-NEXT: kmovw %eax, %k1
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; X32-NEXT: vshufpd {{.*#+}} ymm0 {%k1} {z} = ymm0[1],ymm1[1],ymm0[2],ymm1[2]
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; X32-NEXT: popl %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test_mm256_maskz_shuffle_pd:
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; X64: # BB#0:
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; X64-NEXT: andb $15, %dil
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; X64-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: kmovw %eax, %k1
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; X64-NEXT: vshufpd {{.*#+}} ymm0 {%k1} {z} = ymm0[1],ymm1[1],ymm0[2],ymm1[2]
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; X64-NEXT: retq
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%trn1 = trunc i8 %a0 to i4
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%arg0 = bitcast i4 %trn1 to <4 x i1>
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%res0 = shufflevector <4 x double> %a1, <4 x double> %a2, <4 x i32> <i32 1, i32 5, i32 2, i32 6>
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%res1 = select <4 x i1> %arg0, <4 x double> %res0, <4 x double> zeroinitializer
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ret <4 x double> %res1
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}
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define <4 x float> @test_mm_shuffle_ps(<4 x float> %a0, <4 x float> %a1) {
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; X32-LABEL: test_mm_shuffle_ps:
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; X32: # BB#0:
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; X32-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
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; X32-NEXT: retl
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;
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; X64-LABEL: test_mm_shuffle_ps:
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; X64: # BB#0:
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; X64-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
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; X64-NEXT: retq
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%res = shufflevector <4 x float> %a0, <4 x float> %a1, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
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ret <4 x float> %res
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}
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define <4 x float> @test_mm_mask_shuffle_ps(<4 x float> %a0, i8 %a1, <4 x float> %a2, <4 x float> %a3) {
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; X32-LABEL: test_mm_mask_shuffle_ps:
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; X32: # BB#0:
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; X32-NEXT: pushl %eax
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; X32-NEXT: .Ltmp16:
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; X32-NEXT: .cfi_def_cfa_offset 8
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: andb $15, %al
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; X32-NEXT: movb %al, (%esp)
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; X32-NEXT: movzbl (%esp), %eax
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; X32-NEXT: kmovw %eax, %k1
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; X32-NEXT: vshufps {{.*#+}} xmm0 {%k1} = xmm1[0,1],xmm2[0,0]
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; X32-NEXT: popl %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test_mm_mask_shuffle_ps:
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; X64: # BB#0:
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; X64-NEXT: andb $15, %dil
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; X64-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: kmovw %eax, %k1
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; X64-NEXT: vshufps {{.*#+}} xmm0 {%k1} = xmm1[0,1],xmm2[0,0]
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; X64-NEXT: retq
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%trn1 = trunc i8 %a1 to i4
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%arg1 = bitcast i4 %trn1 to <4 x i1>
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%res0 = shufflevector <4 x float> %a2, <4 x float> %a3, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
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%res1 = select <4 x i1> %arg1, <4 x float> %res0, <4 x float> %a0
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ret <4 x float> %res1
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}
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define <4 x float> @test_mm_maskz_shuffle_ps(i8 %a0, <4 x float> %a1, <4 x float> %a2) {
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; X32-LABEL: test_mm_maskz_shuffle_ps:
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; X32: # BB#0:
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; X32-NEXT: pushl %eax
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; X32-NEXT: .Ltmp17:
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; X32-NEXT: .cfi_def_cfa_offset 8
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: andb $15, %al
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; X32-NEXT: movb %al, (%esp)
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; X32-NEXT: movzbl (%esp), %eax
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; X32-NEXT: kmovw %eax, %k1
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; X32-NEXT: vshufps {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1],xmm1[0,0]
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; X32-NEXT: popl %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test_mm_maskz_shuffle_ps:
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; X64: # BB#0:
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; X64-NEXT: andb $15, %dil
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; X64-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: kmovw %eax, %k1
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; X64-NEXT: vshufps {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1],xmm1[0,0]
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; X64-NEXT: retq
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%trn0 = trunc i8 %a0 to i4
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%arg0 = bitcast i4 %trn0 to <4 x i1>
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%res0 = shufflevector <4 x float> %a1, <4 x float> %a2, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
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%res1 = select <4 x i1> %arg0, <4 x float> %res0, <4 x float> zeroinitializer
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ret <4 x float> %res1
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}
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define <8 x float> @test_mm256_shuffle_ps(<8 x float> %a0, <8 x float> %a1) {
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; X32-LABEL: test_mm256_shuffle_ps:
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; X32: # BB#0:
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; X32-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,1],ymm1[0,0],ymm0[4,5],ymm1[4,4]
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; X32-NEXT: retl
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;
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; X64-LABEL: test_mm256_shuffle_ps:
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; X64: # BB#0:
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; X64-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,1],ymm1[0,0],ymm0[4,5],ymm1[4,4]
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; X64-NEXT: retq
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%res = shufflevector <8 x float> %a0, <8 x float> %a1, <8 x i32> <i32 0, i32 1, i32 8, i32 8, i32 4, i32 5, i32 12, i32 12>
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ret <8 x float> %res
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}
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define <8 x float> @test_mm256_mask_shuffle_ps(<8 x float> %a0, i8 %a1, <8 x float> %a2, <8 x float> %a3) {
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; X32-LABEL: test_mm256_mask_shuffle_ps:
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; X32: # BB#0:
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: kmovw %eax, %k1
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; X32-NEXT: vshufps {{.*#+}} ymm0 {%k1} = ymm1[0,1],ymm2[0,0],ymm1[4,5],ymm2[4,4]
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; X32-NEXT: retl
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;
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; X64-LABEL: test_mm256_mask_shuffle_ps:
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; X64: # BB#0:
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; X64-NEXT: kmovw %edi, %k1
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; X64-NEXT: vshufps {{.*#+}} ymm0 {%k1} = ymm1[0,1],ymm2[0,0],ymm1[4,5],ymm2[4,4]
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; X64-NEXT: retq
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%arg1 = bitcast i8 %a1 to <8 x i1>
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%res0 = shufflevector <8 x float> %a2, <8 x float> %a3, <8 x i32> <i32 0, i32 1, i32 8, i32 8, i32 4, i32 5, i32 12, i32 12>
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%res1 = select <8 x i1> %arg1, <8 x float> %res0, <8 x float> %a0
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ret <8 x float> %res1
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}
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define <8 x float> @test_mm256_maskz_shuffle_ps(i8 %a0, <8 x float> %a1, <8 x float> %a2) {
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; X32-LABEL: test_mm256_maskz_shuffle_ps:
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; X32: # BB#0:
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: kmovw %eax, %k1
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; X32-NEXT: vshufps {{.*#+}} ymm0 {%k1} {z} = ymm0[0,1],ymm1[0,0],ymm0[4,5],ymm1[4,4]
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; X32-NEXT: retl
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;
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; X64-LABEL: test_mm256_maskz_shuffle_ps:
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; X64: # BB#0:
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; X64-NEXT: kmovw %edi, %k1
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; X64-NEXT: vshufps {{.*#+}} ymm0 {%k1} {z} = ymm0[0,1],ymm1[0,0],ymm0[4,5],ymm1[4,4]
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; X64-NEXT: retq
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%arg0 = bitcast i8 %a0 to <8 x i1>
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%res0 = shufflevector <8 x float> %a1, <8 x float> %a2, <8 x i32> <i32 0, i32 1, i32 8, i32 8, i32 4, i32 5, i32 12, i32 12>
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%res1 = select <8 x i1> %arg0, <8 x float> %res0, <8 x float> zeroinitializer
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ret <8 x float> %res1
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}
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!0 = !{i32 1}
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