[Hexagon] Add lit testcases for atomic intrinsics
Patch by Ben Craig. llvm-svn: 327737
This commit is contained in:
Krzysztof Parzyszek
parent
290f26fefd
commit
889cbcacbc
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; RUN: sed -e "s/ORDER/unordered/" %s | llc -march=hexagon -disable-hexagon-amodeopt=0 | FileCheck %s
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; RUN: sed -e "s/ORDER/monotonic/" %s | llc -march=hexagon -disable-hexagon-amodeopt=0 | FileCheck %s
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; RUN: sed -e "s/ORDER/acquire/" %s | llc -march=hexagon -disable-hexagon-amodeopt=0 | FileCheck %s
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; RUN: sed -e "s/ORDER/seq_cst/" %s | llc -march=hexagon -disable-hexagon-amodeopt=0 | FileCheck %s
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%struct.Obj = type { [100 x i32] }
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@i8Src = global i8 0, align 1
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@i8Dest = global i8 0, align 1
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@i16Src = global i16 0, align 2
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@i16Dest = global i16 0, align 2
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@i32Src = global i32 0, align 4
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@i32Dest = global i32 0, align 4
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@i64Src = global i64 0, align 8
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@i64Dest = global i64 0, align 8
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@ptrSrc = global %struct.Obj* null, align 4
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@ptrDest = global %struct.Obj* null, align 4
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define void @load_i8() #0 {
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entry:
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%i8Tmp = load atomic i8, i8* @i8Src ORDER, align 1
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store i8 %i8Tmp, i8* @i8Dest, align 1
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ret void
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}
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; CHECK-LABEL: load_i8:
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; CHECK: [[TMP_REG:r[0-9]+]] = memub(gp+#i8Src)
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; CHECK: memb(gp+#i8Dest) = [[TMP_REG]]
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define void @load_i16() #0 {
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entry:
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%i16Tmp = load atomic i16, i16* @i16Src ORDER, align 2
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store i16 %i16Tmp, i16* @i16Dest, align 2
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ret void
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}
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; CHECK-LABEL: load_i16:
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; CHECK: [[TMP_REG:r[0-9]+]] = memuh(gp+#i16Src)
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; CHECK: memh(gp+#i16Dest) = [[TMP_REG]]
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define void @load_i32() #0 {
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entry:
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%i32Tmp = load atomic i32, i32* @i32Src ORDER, align 4
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store i32 %i32Tmp, i32* @i32Dest, align 4
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ret void
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}
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; CHECK-LABEL: load_i32:
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; CHECK: [[TMP_REG:r[0-9]+]] = memw(gp+#i32Src)
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; CHECK: memw(gp+#i32Dest) = [[TMP_REG]]
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define void @load_i64() #0 {
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entry:
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%i64Tmp = load atomic i64, i64* @i64Src ORDER, align 8
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store i64 %i64Tmp, i64* @i64Dest, align 8
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ret void
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}
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; CHECK-LABEL: load_i64:
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; CHECK: [[TMP_REG:r[0-9]+:[0-9]+]] = memd(gp+#i64Src)
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; CHECK: memd(gp+#i64Dest) = [[TMP_REG]]
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define void @load_ptr() #0 {
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entry:
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%ptrTmp = load atomic i32, i32* bitcast (%struct.Obj** @ptrSrc to i32*) ORDER, align 4
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store i32 %ptrTmp, i32* bitcast (%struct.Obj** @ptrDest to i32*), align 4
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ret void
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}
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; CHECK-LABEL: load_ptr:
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; CHECK: [[TMP_REG:r[0-9]+]] = memw(gp+#ptrSrc)
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; CHECK: memw(gp+#ptrDest) = [[TMP_REG]]
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@ -0,0 +1,87 @@
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; RUN: sed -e "s/ORDER/monotonic/" -e "s/BINARY_OP/add/" %s | llc -march=hexagon | FileCheck %s
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; RUN: sed -e "s/ORDER/acquire/" -e "s/BINARY_OP/add/" %s | llc -march=hexagon | FileCheck %s
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; RUN: sed -e "s/ORDER/release/" -e "s/BINARY_OP/add/" %s | llc -march=hexagon | FileCheck %s
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; RUN: sed -e "s/ORDER/acq_rel/" -e "s/BINARY_OP/add/" %s | llc -march=hexagon | FileCheck %s
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; RUN: sed -e "s/ORDER/seq_cst/" -e "s/BINARY_OP/add/" %s | llc -march=hexagon | FileCheck %s
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; RUN: sed -e "s/ORDER/monotonic/" -e "s/BINARY_OP/sub/" %s | llc -march=hexagon | FileCheck %s
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; RUN: sed -e "s/ORDER/acquire/" -e "s/BINARY_OP/sub/" %s | llc -march=hexagon | FileCheck %s
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; RUN: sed -e "s/ORDER/release/" -e "s/BINARY_OP/sub/" %s | llc -march=hexagon | FileCheck %s
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; RUN: sed -e "s/ORDER/acq_rel/" -e "s/BINARY_OP/sub/" %s | llc -march=hexagon | FileCheck %s
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; RUN: sed -e "s/ORDER/seq_cst/" -e "s/BINARY_OP/sub/" %s | llc -march=hexagon | FileCheck %s
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%struct.Obj = type { [100 x i32] }
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@i32First = global i32 0, align 4
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@i32Second = global i32 0, align 4
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@i32Result = global i32 0, align 4
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@i64First = global i64 0, align 8
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@i64Second = global i64 0, align 8
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@i64Result = global i64 0, align 8
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@ptrFirst = global %struct.Obj* null, align 4
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@ptrSecond = global %struct.Obj* null, align 4
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@ptrResult = global %struct.Obj* null, align 4
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define void @atomicrmw_op_i32() #0 {
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BINARY_OP_entry:
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%i32First = load i32, i32* @i32First, align 4
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%i32Result = atomicrmw BINARY_OP i32* @i32Second, i32 %i32First ORDER
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store i32 %i32Result, i32* @i32Result, align 4
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ret void
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}
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; CHECK-LABEL: atomicrmw_op_i32:
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; CHECK: // %[[BINARY_OP:[a-z_]*]]_entry
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; CHECK-DAG: [[SECOND_ADDR:r[0-9]+]] = ##i32Second
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; CHECK-DAG: [[FIRST_VALUE:r[0-9]+]] = memw(gp+#i32First)
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; CHECK: [[FAIL_LABEL:\.LBB.*]]:
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; CHECK: [[LOCKED_READ_REG:r[0-9]+]] = memw_locked([[SECOND_ADDR]])
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; CHECK: [[RESULT_REG:r[0-9]+]] = [[BINARY_OP]]([[LOCKED_READ_REG]],[[FIRST_VALUE]])
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; CHECK: memw_locked([[SECOND_ADDR]],[[LOCK_PRED_REG:p[0-9]+]]) = [[RESULT_REG]]
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; CHECK: cmp.eq{{.*}}jump{{.*}}[[FAIL_LABEL]]
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; CHECK-DAG: memw(gp+#i32Result) = [[LOCKED_READ_REG]]
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; CHECK-DAG: jumpr r31
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define void @atomicrmw_op_i64() #0 {
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entry:
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%i64First = load i64, i64* @i64First, align 8
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%i64Result = atomicrmw BINARY_OP i64* @i64Second, i64 %i64First ORDER
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store i64 %i64Result, i64* @i64Result, align 8
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ret void
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}
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; CHECK-LABEL: atomicrmw_op_i64:
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; CHECK-DAG: [[SECOND_ADDR:r[0-9]+]] = ##i64Second
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; CHECK-DAG: [[FIRST_VALUE:r[0-9]+:[0-9]+]] = memd(gp+#i64First)
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; CHECK: [[FAIL_LABEL:\.LBB.*]]:
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; CHECK-DAG: [[LOCKED_READ_REG:r[0-9]+:[0-9]+]] = memd_locked([[SECOND_ADDR]])
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; CHECK: [[RESULT_REG:r[0-9]+:[0-9]+]] = [[BINARY_OP]]([[LOCKED_READ_REG]],[[FIRST_VALUE]])
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; CHECK: memd_locked([[SECOND_ADDR]],[[LOCK_PRED_REG:p[0-9]+]]) = [[RESULT_REG]]
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; CHECK: cmp.eq{{.*}}jump{{.*}}[[FAIL_LABEL]]
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; CHECK-DAG: memd(gp+#i64Result) = [[LOCKED_READ_REG]]
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; CHECK-DAG: jumpr r31
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define void @atomicrmw_op_ptr() #0 {
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entry:
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%ptrFirst = load i32, i32* bitcast (%struct.Obj** @ptrFirst to i32*), align 4
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%ptrResult = atomicrmw BINARY_OP i32* bitcast (%struct.Obj** @ptrSecond to i32*), i32 %ptrFirst ORDER
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store i32 %ptrResult, i32* bitcast (%struct.Obj** @ptrResult to i32*), align 4
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ret void
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}
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; CHECK-LABEL: atomicrmw_op_ptr:
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; CHECK-DAG: [[SECOND_ADDR:r[0-9]+]] = ##ptrSecond
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; CHECK-DAG: [[FIRST_VALUE:r[0-9]+]] = memw(gp+#ptrFirst)
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; CHECK: [[FAIL_LABEL:\.LBB.*]]:
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; CHECK-DAG: [[LOCKED_READ_REG:r[0-9]+]] = memw_locked([[SECOND_ADDR]])
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; CHECK: [[RESULT_REG:r[0-9]+]] = [[BINARY_OP]]([[LOCKED_READ_REG]],[[FIRST_VALUE]])
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; CHECK: memw_locked([[SECOND_ADDR]],[[LOCK_PRED_REG:p[0-9]+]]) = [[RESULT_REG]]
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; CHECK: cmp.eq{{.*}}jump{{.*}}[[FAIL_LABEL]]
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; CHECK-DAG: memw(gp+#ptrResult) = [[LOCKED_READ_REG]]
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; CHECK-DAG: jumpr r31
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@ -0,0 +1,22 @@
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; RUN: sed -e "s/ORDER/acquire/" %s | llc -march=hexagon | FileCheck %s
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; RUN: sed -e "s/ORDER/release/" %s | llc -march=hexagon | FileCheck %s
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; RUN: sed -e "s/ORDER/acq_rel/" %s | llc -march=hexagon | FileCheck %s
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; RUN: sed -e "s/ORDER/seq_cst/" %s | llc -march=hexagon | FileCheck %s
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; RUN: sed -e 's/ORDER/syncscope("singlethread") acquire/' %s | llc -march=hexagon | FileCheck %s
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; RUN: sed -e 's/ORDER/syncscope("singlethread") release/' %s | llc -march=hexagon | FileCheck %s
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; RUN: sed -e 's/ORDER/syncscope("singlethread") acq_rel/' %s | llc -march=hexagon | FileCheck %s
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; RUN: sed -e 's/ORDER/syncscope("singlethread") seq_cst/' %s | llc -march=hexagon | FileCheck %s
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define void @fence_func() #0 {
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entry:
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fence ORDER
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ret void
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}
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; CHECK-LABEL: fence_func:
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; CHECK: %bb.0
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; CHECK-NEXT: {
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; CHECK-NEXT: barrier
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: }
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