GlobalISel: Implement widenScalar for G_UNMERGE_VALUES
For the scalar case only. Also move the similar G_MERGE_VALUES handling to a separate function and cleanup to make them look more similar. llvm-svn: 352979
This commit is contained in:
Matt Arsenault
parent
0e5d856eb8
commit
888aa5dedd
|
|
@ -119,6 +119,10 @@ private:
|
|||
// extending back with \p ExtOpcode.
|
||||
void narrowScalarDst(MachineInstr &MI, LLT NarrowTy, unsigned OpIdx,
|
||||
unsigned ExtOpcode);
|
||||
LegalizeResult
|
||||
widenScalarMergeValues(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
|
||||
LegalizeResult
|
||||
widenScalarUnmergeValues(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
|
||||
|
||||
/// Helper function to split a wide generic register into bitwise blocks with
|
||||
/// the given Type (which implies the number of blocks needed). The generic
|
||||
|
|
|
|||
|
|
@ -935,6 +935,85 @@ void LegalizerHelper::narrowScalarDst(MachineInstr &MI, LLT NarrowTy,
|
|||
MO.setReg(DstTrunc);
|
||||
}
|
||||
|
||||
LegalizerHelper::LegalizeResult
|
||||
LegalizerHelper::widenScalarMergeValues(MachineInstr &MI, unsigned TypeIdx,
|
||||
LLT WideTy) {
|
||||
if (TypeIdx != 1)
|
||||
return UnableToLegalize;
|
||||
|
||||
unsigned DstReg = MI.getOperand(0).getReg();
|
||||
LLT DstTy = MRI.getType(DstReg);
|
||||
if (!DstTy.isScalar())
|
||||
return UnableToLegalize;
|
||||
|
||||
unsigned NumOps = MI.getNumOperands();
|
||||
unsigned NumSrc = MI.getNumOperands() - 1;
|
||||
unsigned PartSize = DstTy.getSizeInBits() / NumSrc;
|
||||
|
||||
unsigned Src1 = MI.getOperand(1).getReg();
|
||||
unsigned ResultReg = MIRBuilder.buildZExt(DstTy, Src1)->getOperand(0).getReg();
|
||||
|
||||
for (unsigned I = 2; I != NumOps; ++I) {
|
||||
const unsigned Offset = (I - 1) * PartSize;
|
||||
|
||||
unsigned SrcReg = MI.getOperand(I).getReg();
|
||||
assert(MRI.getType(SrcReg) == LLT::scalar(PartSize));
|
||||
|
||||
auto ZextInput = MIRBuilder.buildZExt(DstTy, SrcReg);
|
||||
|
||||
unsigned NextResult = I + 1 == NumOps ? DstReg :
|
||||
MRI.createGenericVirtualRegister(DstTy);
|
||||
|
||||
auto ShiftAmt = MIRBuilder.buildConstant(DstTy, Offset);
|
||||
auto Shl = MIRBuilder.buildShl(DstTy, ZextInput, ShiftAmt);
|
||||
MIRBuilder.buildOr(NextResult, ResultReg, Shl);
|
||||
ResultReg = NextResult;
|
||||
}
|
||||
|
||||
MI.eraseFromParent();
|
||||
return Legalized;
|
||||
}
|
||||
|
||||
LegalizerHelper::LegalizeResult
|
||||
LegalizerHelper::widenScalarUnmergeValues(MachineInstr &MI, unsigned TypeIdx,
|
||||
LLT WideTy) {
|
||||
if (TypeIdx != 0)
|
||||
return UnableToLegalize;
|
||||
|
||||
unsigned NumDst = MI.getNumOperands() - 1;
|
||||
unsigned SrcReg = MI.getOperand(NumDst).getReg();
|
||||
LLT SrcTy = MRI.getType(SrcReg);
|
||||
if (!SrcTy.isScalar())
|
||||
return UnableToLegalize;
|
||||
|
||||
unsigned Dst0Reg = MI.getOperand(0).getReg();
|
||||
LLT DstTy = MRI.getType(Dst0Reg);
|
||||
if (!DstTy.isScalar())
|
||||
return UnableToLegalize;
|
||||
|
||||
unsigned NewSrcSize = NumDst * WideTy.getSizeInBits();
|
||||
LLT NewSrcTy = LLT::scalar(NewSrcSize);
|
||||
unsigned SizeDiff = WideTy.getSizeInBits() - DstTy.getSizeInBits();
|
||||
|
||||
auto WideSrc = MIRBuilder.buildZExt(NewSrcTy, SrcReg);
|
||||
|
||||
for (unsigned I = 1; I != NumDst; ++I) {
|
||||
auto ShiftAmt = MIRBuilder.buildConstant(NewSrcTy, SizeDiff * I);
|
||||
auto Shl = MIRBuilder.buildShl(NewSrcTy, WideSrc, ShiftAmt);
|
||||
WideSrc = MIRBuilder.buildOr(NewSrcTy, WideSrc, Shl);
|
||||
}
|
||||
|
||||
Observer.changingInstr(MI);
|
||||
|
||||
MI.getOperand(NumDst).setReg(WideSrc->getOperand(0).getReg());
|
||||
for (unsigned I = 0; I != NumDst; ++I)
|
||||
widenScalarDst(MI, WideTy, I);
|
||||
|
||||
Observer.changedInstr(MI);
|
||||
|
||||
return Legalized;
|
||||
}
|
||||
|
||||
LegalizerHelper::LegalizeResult
|
||||
LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) {
|
||||
MIRBuilder.setInstr(MI);
|
||||
|
|
@ -968,45 +1047,10 @@ LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) {
|
|||
|
||||
return Legalized;
|
||||
}
|
||||
case TargetOpcode::G_MERGE_VALUES: {
|
||||
if (TypeIdx != 1)
|
||||
return UnableToLegalize;
|
||||
|
||||
unsigned DstReg = MI.getOperand(0).getReg();
|
||||
LLT DstTy = MRI.getType(DstReg);
|
||||
if (!DstTy.isScalar())
|
||||
return UnableToLegalize;
|
||||
|
||||
unsigned NumSrc = MI.getNumOperands() - 1;
|
||||
unsigned EltSize = DstTy.getSizeInBits() / NumSrc;
|
||||
|
||||
unsigned ResultReg = MRI.createGenericVirtualRegister(DstTy);
|
||||
unsigned Offset = 0;
|
||||
for (unsigned I = 1, E = MI.getNumOperands(); I != E; ++I,
|
||||
Offset += EltSize) {
|
||||
assert(MRI.getType(MI.getOperand(I).getReg()) == LLT::scalar(EltSize));
|
||||
|
||||
unsigned ShiftAmt = MRI.createGenericVirtualRegister(DstTy);
|
||||
unsigned Shl = MRI.createGenericVirtualRegister(DstTy);
|
||||
unsigned ZextInput = MRI.createGenericVirtualRegister(DstTy);
|
||||
MIRBuilder.buildZExt(ZextInput, MI.getOperand(I).getReg());
|
||||
|
||||
if (Offset != 0) {
|
||||
unsigned NextResult = I + 1 == E ? DstReg :
|
||||
MRI.createGenericVirtualRegister(DstTy);
|
||||
|
||||
MIRBuilder.buildConstant(ShiftAmt, Offset);
|
||||
MIRBuilder.buildShl(Shl, ZextInput, ShiftAmt);
|
||||
MIRBuilder.buildOr(NextResult, ResultReg, Shl);
|
||||
ResultReg = NextResult;
|
||||
} else {
|
||||
ResultReg = ZextInput;
|
||||
}
|
||||
}
|
||||
|
||||
MI.eraseFromParent();
|
||||
return Legalized;
|
||||
}
|
||||
case TargetOpcode::G_MERGE_VALUES:
|
||||
return widenScalarMergeValues(MI, TypeIdx, WideTy);
|
||||
case TargetOpcode::G_UNMERGE_VALUES:
|
||||
return widenScalarUnmergeValues(MI, TypeIdx, WideTy);
|
||||
case TargetOpcode::G_UADDO:
|
||||
case TargetOpcode::G_USUBO: {
|
||||
if (TypeIdx == 1)
|
||||
|
|
|
|||
|
|
@ -34,6 +34,7 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST,
|
|||
};
|
||||
|
||||
const LLT S1 = LLT::scalar(1);
|
||||
const LLT S8 = LLT::scalar(8);
|
||||
const LLT S16 = LLT::scalar(16);
|
||||
const LLT S32 = LLT::scalar(32);
|
||||
const LLT S64 = LLT::scalar(64);
|
||||
|
|
@ -169,7 +170,7 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST,
|
|||
.legalFor({{S64, S32}, {S32, S16}, {S64, S16},
|
||||
{S32, S1}, {S64, S1}, {S16, S1},
|
||||
// FIXME: Hack
|
||||
{S128, S32}, {S128, S64}, {S32, LLT::scalar(24)}})
|
||||
{S32, S8}, {S128, S32}, {S128, S64}, {S32, LLT::scalar(24)}})
|
||||
.scalarize(0);
|
||||
|
||||
getActionDefinitionsBuilder({G_SITOFP, G_UITOFP})
|
||||
|
|
|
|||
|
|
@ -1,28 +1,34 @@
|
|||
# RUN: llc -O0 -run-pass=legalizer -global-isel-abort=0 -pass-remarks-missed='gisel*' %s -o - 2>&1 | FileCheck %s
|
||||
|
||||
--- |
|
||||
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
|
||||
target triple = "aarch64--"
|
||||
define void @test_unmerge_s4() {
|
||||
ret void
|
||||
}
|
||||
...
|
||||
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
||||
# RUN: llc -march=aarch64 -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s
|
||||
# RUN: llc -march=aarch64 -O0 -run-pass=legalizer -global-isel-abort=0 -pass-remarks-missed='gisel*' %s -o /dev/null 2>&1 | FileCheck -check-prefix=ERROR %s
|
||||
# ERROR: unable to legalize instruction: %3:_(s64) = G_ANYEXT %1:_(s4) (in function: test_unmerge_s4)
|
||||
|
||||
---
|
||||
name: test_unmerge_s4
|
||||
registers:
|
||||
- { id: 0, class: _ }
|
||||
- { id: 1, class: _ }
|
||||
- { id: 2, class: _ }
|
||||
- { id: 3, class: _ }
|
||||
name: test_unmerge_s4
|
||||
body: |
|
||||
bb.0:
|
||||
%0(s8) = G_CONSTANT i8 0
|
||||
; Previously, LegalizerInfo was assuming all G_MERGE_VALUES and G_UNMERGE_VALUES
|
||||
; instructions are legal. Make sure that is no longer happening.
|
||||
; CHECK: unable to legalize instruction: {{.*}} G_UNMERGE_VALUES
|
||||
%1(s4), %2(s4)= G_UNMERGE_VALUES %0(s8)
|
||||
%3(s64) = G_ANYEXT %1(s4)
|
||||
$x0 = COPY %3(s64)
|
||||
; CHECK-LABEL: name: test_unmerge_s4
|
||||
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
||||
; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s32)
|
||||
; CHECK: [[ZEXT:%[0-9]+]]:_(s16) = G_ZEXT [[TRUNC]](s8)
|
||||
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
|
||||
; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[C1]](s32)
|
||||
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ZEXT]](s16)
|
||||
; CHECK: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[TRUNC1]](s16)
|
||||
; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[ANYEXT]], [[ZEXT1]](s32)
|
||||
; CHECK: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32)
|
||||
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[ZEXT]](s16)
|
||||
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC2]](s16)
|
||||
; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[ANYEXT1]], [[ANYEXT2]]
|
||||
; CHECK: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[OR]](s32)
|
||||
; CHECK: [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[TRUNC3]](s16)
|
||||
; CHECK: [[TRUNC4:%[0-9]+]]:_(s4) = G_TRUNC [[UV]](s8)
|
||||
; CHECK: [[ANYEXT3:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC4]](s4)
|
||||
; CHECK: [[TRUNC5:%[0-9]+]]:_(s4) = G_TRUNC [[UV1]](s8)
|
||||
; CHECK: $x0 = COPY [[ANYEXT3]](s64)
|
||||
%0:_(s8) = G_CONSTANT i8 0
|
||||
%1:_(s4), %2:_(s4)= G_UNMERGE_VALUES %0
|
||||
%3:_(s64) = G_ANYEXT %1
|
||||
$x0 = COPY %3
|
||||
|
||||
...
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
||||
# RUN: llc -mtriple=amdgcn-- -O0 -run-pass=legalizer -o - %s | FileCheck %s
|
||||
# RUN: llc -mtriple=amdgcn-- -O0 -run-pass=legalizer -global-isel-abort=0 -o - %s | FileCheck %s
|
||||
|
||||
---
|
||||
name: test_unmerge_s32_s64
|
||||
|
|
@ -75,3 +75,234 @@ body: |
|
|||
$vgpr2 = COPY %6
|
||||
...
|
||||
|
||||
---
|
||||
name: test_unmerge_s8_s16
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0
|
||||
; CHECK-LABEL: name: test_unmerge_s8_s16
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
|
||||
; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
|
||||
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
|
||||
; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)
|
||||
; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
|
||||
; CHECK: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[OR]](s32)
|
||||
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16)
|
||||
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s16)
|
||||
; CHECK: $vgpr0 = COPY [[ANYEXT]](s32)
|
||||
; CHECK: $vgpr1 = COPY [[ANYEXT1]](s32)
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s16) = G_TRUNC %0
|
||||
%2:_(s8), %3:_(s8) = G_UNMERGE_VALUES %1
|
||||
%4:_(s32) = G_ANYEXT %2
|
||||
%5:_(s32) = G_ANYEXT %3
|
||||
$vgpr0 = COPY %4
|
||||
$vgpr1 = COPY %5
|
||||
...
|
||||
|
||||
---
|
||||
name: test_unmerge_s8_s32
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0
|
||||
; CHECK-LABEL: name: test_unmerge_s8_s32
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s32)
|
||||
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
|
||||
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)
|
||||
; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[TRUNC]](s32)
|
||||
; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[ZEXT]], [[SHL]]
|
||||
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
|
||||
; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[C1]](s64)
|
||||
; CHECK: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[OR]], [[TRUNC1]](s32)
|
||||
; CHECK: [[OR1:%[0-9]+]]:_(s64) = G_OR [[OR]], [[SHL1]]
|
||||
; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 24
|
||||
; CHECK: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
|
||||
; CHECK: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[OR1]], [[TRUNC2]](s32)
|
||||
; CHECK: [[OR2:%[0-9]+]]:_(s64) = G_OR [[OR1]], [[SHL2]]
|
||||
; CHECK: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[OR2]](s64)
|
||||
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16)
|
||||
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s16)
|
||||
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s16)
|
||||
; CHECK: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[UV3]](s16)
|
||||
; CHECK: $vgpr0 = COPY [[ANYEXT]](s32)
|
||||
; CHECK: $vgpr1 = COPY [[ANYEXT1]](s32)
|
||||
; CHECK: $vgpr2 = COPY [[ANYEXT2]](s32)
|
||||
; CHECK: $vgpr3 = COPY [[ANYEXT3]](s32)
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s8), %2:_(s8), %3:_(s8), %4:_(s8) = G_UNMERGE_VALUES %0
|
||||
%5:_(s32) = G_ANYEXT %1
|
||||
%6:_(s32) = G_ANYEXT %2
|
||||
%7:_(s32) = G_ANYEXT %3
|
||||
%8:_(s32) = G_ANYEXT %4
|
||||
$vgpr0 = COPY %5
|
||||
$vgpr1 = COPY %6
|
||||
$vgpr2 = COPY %7
|
||||
$vgpr3 = COPY %8
|
||||
...
|
||||
|
||||
---
|
||||
name: test_unmerge_s16_s32
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0
|
||||
; CHECK-LABEL: name: test_unmerge_s16_s32
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; CHECK: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](s32)
|
||||
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16)
|
||||
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s16)
|
||||
; CHECK: $vgpr0 = COPY [[ANYEXT]](s32)
|
||||
; CHECK: $vgpr1 = COPY [[ANYEXT1]](s32)
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s16), %2:_(s16) = G_UNMERGE_VALUES %0
|
||||
%3:_(s32) = G_ANYEXT %1
|
||||
%4:_(s32) = G_ANYEXT %2
|
||||
$vgpr0 = COPY %3
|
||||
$vgpr1 = COPY %4
|
||||
...
|
||||
|
||||
---
|
||||
name: test_unmerge_s16_s64
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1
|
||||
; CHECK-LABEL: name: test_unmerge_s16_s64
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
|
||||
; CHECK: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](s64)
|
||||
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16)
|
||||
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s16)
|
||||
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s16)
|
||||
; CHECK: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[UV3]](s16)
|
||||
; CHECK: $vgpr0 = COPY [[ANYEXT]](s32)
|
||||
; CHECK: $vgpr1 = COPY [[ANYEXT1]](s32)
|
||||
; CHECK: $vgpr2 = COPY [[ANYEXT2]](s32)
|
||||
; CHECK: $vgpr3 = COPY [[ANYEXT3]](s32)
|
||||
%0:_(s64) = COPY $vgpr0_vgpr1
|
||||
%1:_(s16), %2:_(s16), %3:_(s16), %4:_(s16) = G_UNMERGE_VALUES %0
|
||||
%5:_(s32) = G_ANYEXT %1
|
||||
%6:_(s32) = G_ANYEXT %2
|
||||
%7:_(s32) = G_ANYEXT %3
|
||||
%8:_(s32) = G_ANYEXT %4
|
||||
$vgpr0 = COPY %5
|
||||
$vgpr1 = COPY %6
|
||||
$vgpr2 = COPY %7
|
||||
$vgpr3 = COPY %8
|
||||
...
|
||||
|
||||
---
|
||||
name: test_unmerge_s1_s3
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0
|
||||
; CHECK-LABEL: name: test_unmerge_s1_s3
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; CHECK: [[TRUNC:%[0-9]+]]:_(s3) = G_TRUNC [[COPY]](s32)
|
||||
; CHECK: [[ZEXT:%[0-9]+]]:_(s48) = G_ZEXT [[TRUNC]](s3)
|
||||
; CHECK: [[C:%[0-9]+]]:_(s48) = G_CONSTANT i48 15
|
||||
; CHECK: [[SHL:%[0-9]+]]:_(s48) = G_SHL [[ZEXT]], [[C]](s48)
|
||||
; CHECK: [[OR:%[0-9]+]]:_(s48) = G_OR [[ZEXT]], [[SHL]]
|
||||
; CHECK: [[C1:%[0-9]+]]:_(s48) = G_CONSTANT i48 30
|
||||
; CHECK: [[SHL1:%[0-9]+]]:_(s48) = G_SHL [[OR]], [[C1]](s48)
|
||||
; CHECK: [[OR1:%[0-9]+]]:_(s48) = G_OR [[OR]], [[SHL1]]
|
||||
; CHECK: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[OR1]](s48)
|
||||
; CHECK: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[UV]](s16)
|
||||
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC1]](s1)
|
||||
; CHECK: [[TRUNC2:%[0-9]+]]:_(s1) = G_TRUNC [[UV1]](s16)
|
||||
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC2]](s1)
|
||||
; CHECK: [[TRUNC3:%[0-9]+]]:_(s1) = G_TRUNC [[UV2]](s16)
|
||||
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC3]](s1)
|
||||
; CHECK: $vgpr0 = COPY [[ANYEXT]](s32)
|
||||
; CHECK: $vgpr1 = COPY [[ANYEXT1]](s32)
|
||||
; CHECK: $vgpr2 = COPY [[ANYEXT2]](s32)
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s3) = G_TRUNC %0
|
||||
%2:_(s1), %3:_(s1), %4:_(s1) = G_UNMERGE_VALUES %1
|
||||
%5:_(s32) = G_ANYEXT %2
|
||||
%6:_(s32) = G_ANYEXT %3
|
||||
%7:_(s32) = G_ANYEXT %4
|
||||
$vgpr0 = COPY %5
|
||||
$vgpr1 = COPY %6
|
||||
$vgpr2 = COPY %7
|
||||
...
|
||||
|
||||
---
|
||||
name: test_unmerge_s1_s8
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0
|
||||
; CHECK-LABEL: name: test_unmerge_s1_s8
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
|
||||
; CHECK: [[ZEXT:%[0-9]+]]:_(s128) = G_ZEXT [[TRUNC]](s8)
|
||||
; CHECK: [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 15
|
||||
; CHECK: [[SHL:%[0-9]+]]:_(s128) = G_SHL [[ZEXT]], [[C]](s128)
|
||||
; CHECK: [[OR:%[0-9]+]]:_(s128) = G_OR [[ZEXT]], [[SHL]]
|
||||
; CHECK: [[C1:%[0-9]+]]:_(s128) = G_CONSTANT i128 30
|
||||
; CHECK: [[SHL1:%[0-9]+]]:_(s128) = G_SHL [[OR]], [[C1]](s128)
|
||||
; CHECK: [[OR1:%[0-9]+]]:_(s128) = G_OR [[OR]], [[SHL1]]
|
||||
; CHECK: [[C2:%[0-9]+]]:_(s128) = G_CONSTANT i128 45
|
||||
; CHECK: [[SHL2:%[0-9]+]]:_(s128) = G_SHL [[OR1]], [[C2]](s128)
|
||||
; CHECK: [[OR2:%[0-9]+]]:_(s128) = G_OR [[OR1]], [[SHL2]]
|
||||
; CHECK: [[C3:%[0-9]+]]:_(s128) = G_CONSTANT i128 60
|
||||
; CHECK: [[SHL3:%[0-9]+]]:_(s128) = G_SHL [[OR2]], [[C3]](s128)
|
||||
; CHECK: [[OR3:%[0-9]+]]:_(s128) = G_OR [[OR2]], [[SHL3]]
|
||||
; CHECK: [[C4:%[0-9]+]]:_(s128) = G_CONSTANT i128 75
|
||||
; CHECK: [[SHL4:%[0-9]+]]:_(s128) = G_SHL [[OR3]], [[C4]](s128)
|
||||
; CHECK: [[OR4:%[0-9]+]]:_(s128) = G_OR [[OR3]], [[SHL4]]
|
||||
; CHECK: [[C5:%[0-9]+]]:_(s128) = G_CONSTANT i128 90
|
||||
; CHECK: [[SHL5:%[0-9]+]]:_(s128) = G_SHL [[OR4]], [[C5]](s128)
|
||||
; CHECK: [[OR5:%[0-9]+]]:_(s128) = G_OR [[OR4]], [[SHL5]]
|
||||
; CHECK: [[C6:%[0-9]+]]:_(s128) = G_CONSTANT i128 105
|
||||
; CHECK: [[SHL6:%[0-9]+]]:_(s128) = G_SHL [[OR5]], [[C6]](s128)
|
||||
; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[OR5]](s128)
|
||||
; CHECK: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[SHL6]](s128)
|
||||
; CHECK: [[OR6:%[0-9]+]]:_(s64) = G_OR [[UV]], [[UV2]]
|
||||
; CHECK: [[OR7:%[0-9]+]]:_(s64) = G_OR [[UV1]], [[UV3]]
|
||||
; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[OR6]](s64), [[OR7]](s64)
|
||||
; CHECK: [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16), [[UV6:%[0-9]+]]:_(s16), [[UV7:%[0-9]+]]:_(s16), [[UV8:%[0-9]+]]:_(s16), [[UV9:%[0-9]+]]:_(s16), [[UV10:%[0-9]+]]:_(s16), [[UV11:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[MV]](s128)
|
||||
; CHECK: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[UV4]](s16)
|
||||
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC1]](s1)
|
||||
; CHECK: [[TRUNC2:%[0-9]+]]:_(s1) = G_TRUNC [[UV5]](s16)
|
||||
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC2]](s1)
|
||||
; CHECK: [[TRUNC3:%[0-9]+]]:_(s1) = G_TRUNC [[UV6]](s16)
|
||||
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC3]](s1)
|
||||
; CHECK: [[TRUNC4:%[0-9]+]]:_(s1) = G_TRUNC [[UV7]](s16)
|
||||
; CHECK: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC4]](s1)
|
||||
; CHECK: [[TRUNC5:%[0-9]+]]:_(s1) = G_TRUNC [[UV8]](s16)
|
||||
; CHECK: [[ANYEXT4:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC5]](s1)
|
||||
; CHECK: [[TRUNC6:%[0-9]+]]:_(s1) = G_TRUNC [[UV9]](s16)
|
||||
; CHECK: [[ANYEXT5:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC6]](s1)
|
||||
; CHECK: [[TRUNC7:%[0-9]+]]:_(s1) = G_TRUNC [[UV10]](s16)
|
||||
; CHECK: [[ANYEXT6:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC7]](s1)
|
||||
; CHECK: [[TRUNC8:%[0-9]+]]:_(s1) = G_TRUNC [[UV11]](s16)
|
||||
; CHECK: [[ANYEXT7:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC8]](s1)
|
||||
; CHECK: $vgpr0 = COPY [[ANYEXT]](s32)
|
||||
; CHECK: $vgpr1 = COPY [[ANYEXT1]](s32)
|
||||
; CHECK: $vgpr2 = COPY [[ANYEXT2]](s32)
|
||||
; CHECK: $vgpr3 = COPY [[ANYEXT3]](s32)
|
||||
; CHECK: $vgpr4 = COPY [[ANYEXT4]](s32)
|
||||
; CHECK: $vgpr5 = COPY [[ANYEXT5]](s32)
|
||||
; CHECK: $vgpr6 = COPY [[ANYEXT6]](s32)
|
||||
; CHECK: $vgpr7 = COPY [[ANYEXT7]](s32)
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s8) = G_TRUNC %0
|
||||
%2:_(s1), %3:_(s1), %4:_(s1), %5:_(s1), %6:_(s1), %7:_(s1), %8:_(s1), %9:_(s1) = G_UNMERGE_VALUES %1
|
||||
%10:_(s32) = G_ANYEXT %2
|
||||
%11:_(s32) = G_ANYEXT %3
|
||||
%12:_(s32) = G_ANYEXT %4
|
||||
%13:_(s32) = G_ANYEXT %5
|
||||
%14:_(s32) = G_ANYEXT %6
|
||||
%15:_(s32) = G_ANYEXT %7
|
||||
%16:_(s32) = G_ANYEXT %8
|
||||
%17:_(s32) = G_ANYEXT %9
|
||||
$vgpr0 = COPY %10
|
||||
$vgpr1 = COPY %11
|
||||
$vgpr2 = COPY %12
|
||||
$vgpr3 = COPY %13
|
||||
$vgpr4 = COPY %14
|
||||
$vgpr5 = COPY %15
|
||||
$vgpr6 = COPY %16
|
||||
$vgpr7 = COPY %17
|
||||
...
|
||||
|
|
|
|||
Loading…
Reference in New Issue