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[AArch64] Fix FP16 vector instructions that should only accept low registers 

llvm-svn: 255113
This commit is contained in:
Oliver Stannard 2015-12-09 14:32:11 +00:00
parent 3c7223133d
commit 86f729296a
2 changed files with 43 additions and 3 deletions
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6
llvm/lib/Target/AArch64/AArch64InstrFormats.td
View File

@ -6855,11 +6855,11 @@ multiclass SIMDFPIndexed<bit U, bits<4> opc, string asm,
let Predicates = [HasNEON, HasFullFP16] in {
def v1i16_indexed : BaseSIMDIndexed<1, U, 1, 0b00, opc,
FPR16Op, FPR16Op, V128, VectorIndexH,
FPR16Op, FPR16Op, V128_lo, VectorIndexH,
asm, ".h", "", "", ".h",
[(set (f16 FPR16Op:$Rd),
(OpNode (f16 FPR16Op:$Rn),
(f16 (vector_extract (v8f16 V128:$Rm),
(f16 (vector_extract (v8f16 V128_lo:$Rm),
VectorIndexH:$idx))))]> {
bits<3> idx;
let Inst{11} = idx{2};
@ -6995,7 +6995,7 @@ multiclass SIMDFPIndexedTied<bit U, bits<4> opc, string asm> {
let Predicates = [HasNEON, HasFullFP16] in {
def v1i16_indexed : BaseSIMDIndexedTied<1, U, 1, 0b00, opc,
FPR16Op, FPR16Op, V128, VectorIndexH,
FPR16Op, FPR16Op, V128_lo, VectorIndexH,
asm, ".h", "", "", ".h", []> {
bits<3> idx;
let Inst{11} = idx{2};

40
llvm/test/MC/AArch64/fullfp16-diagnostics.s
View File

@ -40,3 +40,43 @@
// CHECK: error: invalid operand for instruction
// CHECK-NEXT: fmulx v2.8h, v3.8h, v17.h[6]
// CHECK-NEXT: ^
fmla h0, h1, v16.h[3]
fmla h2, h3, v17.h[6]
// CHECK: error: invalid operand for instruction
// CHECK-NEXT: fmla h0, h1, v16.h[3]
// CHECK-NEXT: ^
// CHECK: error: invalid operand for instruction
// CHECK-NEXT: fmla h2, h3, v17.h[6]
// CHECK-NEXT: ^
fmls h0, h1, v16.h[3]
fmls h2, h3, v17.h[6]
// CHECK: error: invalid operand for instruction
// CHECK-NEXT: fmls h0, h1, v16.h[3]
// CHECK-NEXT: ^
// CHECK: error: invalid operand for instruction
// CHECK-NEXT: fmls h2, h3, v17.h[6]
// CHECK-NEXT: ^
fmul h0, h1, v16.h[3]
fmul h2, h3, v17.h[6]
// CHECK: error: invalid operand for instruction
// CHECK-NEXT: fmul h0, h1, v16.h[3]
// CHECK-NEXT: ^
// CHECK: error: invalid operand for instruction
// CHECK-NEXT: fmul h2, h3, v17.h[6]
// CHECK-NEXT: ^
fmulx h0, h1, v16.h[3]
fmulx h2, h3, v17.h[6]
// CHECK: error: invalid operand for instruction
// CHECK-NEXT: fmulx h0, h1, v16.h[3]
// CHECK-NEXT: ^
// CHECK: error: invalid operand for instruction
// CHECK-NEXT: fmulx h2, h3, v17.h[6]
// CHECK-NEXT: ^