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fix PR3538 for ARM. 

llvm-svn: 64384
This commit is contained in:
Chris Lattner 2009-02-12 17:38:23 +00:00
parent 4d4c702d5f
commit 844deb73f4
1 changed files with 19 additions and 12 deletions
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21
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
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@ -837,13 +837,18 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
SDValue N1 = Op.getOperand(1); SDValue N1 = Op.getOperand(1);
SDValue N2 = Op.getOperand(2); SDValue N2 = Op.getOperand(2);
FrameIndexSDNode *FINode = dyn_cast<FrameIndexSDNode>(N1); FrameIndexSDNode *FINode = dyn_cast<FrameIndexSDNode>(N1);
if (!FINode) // FIXME: handle VLAs.
break; if (!FINode) {
ReplaceUses(Op.getValue(0), Chain);
return NULL;
}
if (N2.getOpcode() == ARMISD::PIC_ADD && isa<LoadSDNode>(N2.getOperand(0))) if (N2.getOpcode() == ARMISD::PIC_ADD && isa<LoadSDNode>(N2.getOperand(0)))
N2 = N2.getOperand(0); N2 = N2.getOperand(0);
LoadSDNode *Ld = dyn_cast<LoadSDNode>(N2); LoadSDNode *Ld = dyn_cast<LoadSDNode>(N2);
if (!Ld) if (!Ld) {
break; ReplaceUses(Op.getValue(0), Chain);
return NULL;
}
SDValue BasePtr = Ld->getBasePtr(); SDValue BasePtr = Ld->getBasePtr();
assert(BasePtr.getOpcode() == ARMISD::Wrapper && assert(BasePtr.getOpcode() == ARMISD::Wrapper &&
isa<ConstantPoolSDNode>(BasePtr.getOperand(0)) && isa<ConstantPoolSDNode>(BasePtr.getOperand(0)) &&
@ -855,7 +860,11 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
GV = ACPV->getGV(); GV = ACPV->getGV();
} else } else
GV = dyn_cast<GlobalValue>(CP->getConstVal()); GV = dyn_cast<GlobalValue>(CP->getConstVal());
if (GV) { if (!GV) {
ReplaceUses(Op.getValue(0), Chain);
return NULL;
}
SDValue Tmp1 = CurDAG->getTargetFrameIndex(FINode->getIndex(), SDValue Tmp1 = CurDAG->getTargetFrameIndex(FINode->getIndex(),
TLI.getPointerTy()); TLI.getPointerTy());
SDValue Tmp2 = CurDAG->getTargetGlobalAddress(GV, TLI.getPointerTy()); SDValue Tmp2 = CurDAG->getTargetGlobalAddress(GV, TLI.getPointerTy());
@ -863,8 +872,6 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
return CurDAG->getTargetNode(TargetInstrInfo::DECLARE, dl, return CurDAG->getTargetNode(TargetInstrInfo::DECLARE, dl,
MVT::Other, Ops, 3); MVT::Other, Ops, 3);
} }
break;
}
} }
return SelectCode(Op); return SelectCode(Op);