[ELF] Improve comments in aarch64 errata fix test [NFC]
Comment improvements split out from review D36749. No changes to any non comment line. llvm-svn: 320372
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@ -7,31 +7,31 @@
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// RUN: ld.lld --script %t.script -fix-cortex-a53-843419 -verbose %t.o -o %t2 | FileCheck %s
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// Test cases for Cortex-A53 Erratum 843419 that involve interactions
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// between the generated patches and the address of sections
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// between the generated patches and the address of sections.
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// See ARM-EPM-048406 Cortex_A53_MPCore_Software_Developers_Errata_Notice.pdf
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// for full erratum details.
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// In Summary
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// 1.)
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// ADRP (0xff8 or 0xffc)
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// ADRP (0xff8 or 0xffc).
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// 2.)
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// - load or store single register or either integer or vector registers
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// - STP or STNP of either vector or vector registers
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// - Advanced SIMD ST1 store instruction
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// Must not write Rn
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// 3.) optional instruction, can't be a branch, must not write Rn, may read Rn
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// - load or store single register or either integer or vector registers.
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// - STP or STNP of either vector or vector registers.
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// - Advanced SIMD ST1 store instruction.
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// - Must not write Rn.
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// 3.) optional instruction, can't be a branch, must not write Rn, may read Rn.
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// 4.) A load or store instruction from the Load/Store register unsigned
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// immediate class using Rn as the base register
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// immediate class using Rn as the base register.
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// An aarch64 section can contain ranges of literal data embedded within the
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// code, these ranges are encoded with mapping symbols. This tests that we
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// can match the erratum sequence in code, but not data
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// can match the erratum sequence in code, but not data.
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// - We can handle more than one patch per code range (denoted by mapping
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// symbols)
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// symbols).
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// - We can handle a patch in more than range of code, with literal data
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// inbetween
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// inbetween.
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// - We can handle redundant mapping symbols (two or more consecutive mapping
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// symbols with the same type)
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// symbols with the same type).
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// - We can ignore erratum sequences in multiple literal data ranges.
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// CHECK: detected cortex-a53-843419 erratum sequence starting at FF8 in unpatched output.
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@ -47,10 +47,9 @@ t3_ff8_ldr:
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ldr x0, [x0, :got_lo12:dat]
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ret
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// create a redundant mapping symbol as we are already in a $x range
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// some object producers unconditionally generate a mapping symbol on
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// every symbol so we need to handle the case of $x $x
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// every symbol so we need to handle the case of $x $x.
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.local $x.999
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$x.999:
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// CHECK-NEXT: detected cortex-a53-843419 erratum sequence starting at 1FFC in unpatched output.
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@ -63,7 +62,7 @@ t3_ffc_ldrsimd:
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ldr x2, [x0, :got_lo12:dat]
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ret
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// Inline data containing bit pattern of erratum sequence, expect no patch
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// Inline data containing bit pattern of erratum sequence, expect no patch.
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.globl t3_ffc_ldralldata
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.type t3_ff8_ldralldata, %function
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.space 4096 - 20
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@ -83,7 +82,7 @@ t3_ff8_ldralldata:
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.byte 0x00
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.byte 0x40
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.byte 0xf9
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// Check that we can recognise the erratum sequence post literal data
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// Check that we can recognise the erratum sequence post literal data.
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// CHECK-NEXT: detected cortex-a53-843419 erratum sequence starting at 3FF8 in unpatched output.
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@ -100,8 +99,8 @@ t3_ff8_ldralldata:
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.space 4096 - 12
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// Start a new InputSectionDescription (see Linker Script) so the
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// start address will be
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// affected by any patches added to previous InputSectionDescription
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// start address will be affected by any patches added to previous
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// InputSectionDescription.
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// CHECK: detected cortex-a53-843419 erratum sequence starting at 4FFC in unpatched output.
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@ -118,8 +117,8 @@ t3_ffc_str:
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// CHECK: detected cortex-a53-843419 erratum sequence starting at 5FF8 in unpatched output.
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// Start a new OutputSection (see Linker Script) so the
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// start address will be
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// affected by any patches added to previous InputSectionDescription
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// start address will be affected by any patches added to previous
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// InputSectionDescription.
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.section .newos, "ax", %progbits
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.globl t3_ff8_str
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.type t3_ff8_str, %function
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