[NEON] Fix support for vrndi_f32(), vrndiq_f32() and vrndns_f32() intrinsics
This patch adds support for vrndi_f32() and vrndiq_f32() intrinsics in AArch32 mode and for vrndns_f32() intrinsic in AArch64 mode. Differential Revision: https://reviews.llvm.org/D48829 llvm-svn: 337690
This commit is contained in:
Ivan A. Kosarev
parent
e2183d508a
commit
8264bb8d34
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@ -988,6 +988,7 @@ def FRINTP_S32 : SInst<"vrndp", "dd", "fQf">;
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def FRINTM_S32 : SInst<"vrndm", "dd", "fQf">;
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def FRINTX_S32 : SInst<"vrndx", "dd", "fQf">;
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def FRINTZ_S32 : SInst<"vrnd", "dd", "fQf">;
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def FRINTI_S32 : SInst<"vrndi", "dd", "fQf">;
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}
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let ArchGuard = "__ARM_ARCH >= 8 && defined(__aarch64__) && defined(__ARM_FEATURE_DIRECTED_ROUNDING)" in {
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@ -997,7 +998,7 @@ def FRINTP_S64 : SInst<"vrndp", "dd", "dQd">;
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def FRINTM_S64 : SInst<"vrndm", "dd", "dQd">;
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def FRINTX_S64 : SInst<"vrndx", "dd", "dQd">;
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def FRINTZ_S64 : SInst<"vrnd", "dd", "dQd">;
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def FRINTI_S64 : SInst<"vrndi", "dd", "fdQfQd">;
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def FRINTI_S64 : SInst<"vrndi", "dd", "dQd">;
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}
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////////////////////////////////////////////////////////////////////////////////
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@ -4158,6 +4158,8 @@ static const NeonIntrinsicInfo ARMSIMDIntrinsicMap [] = {
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NEONMAP1(vrnd_v, arm_neon_vrintz, Add1ArgType),
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NEONMAP1(vrnda_v, arm_neon_vrinta, Add1ArgType),
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NEONMAP1(vrndaq_v, arm_neon_vrinta, Add1ArgType),
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NEONMAP0(vrndi_v),
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NEONMAP0(vrndiq_v),
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NEONMAP1(vrndm_v, arm_neon_vrintm, Add1ArgType),
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NEONMAP1(vrndmq_v, arm_neon_vrintm, Add1ArgType),
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NEONMAP1(vrndn_v, arm_neon_vrintn, Add1ArgType),
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@ -4334,6 +4336,8 @@ static const NeonIntrinsicInfo AArch64SIMDIntrinsicMap[] = {
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NEONMAP1(vrecpsq_v, aarch64_neon_frecps, Add1ArgType),
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NEONMAP2(vrhadd_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts),
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NEONMAP2(vrhaddq_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts),
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NEONMAP0(vrndi_v),
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NEONMAP0(vrndiq_v),
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NEONMAP2(vrshl_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts),
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NEONMAP2(vrshlq_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts),
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NEONMAP2(vrshr_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts),
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@ -5094,7 +5098,10 @@ Value *CodeGenFunction::EmitCommonNeonBuiltinExpr(
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case NEON::BI__builtin_neon_vrsqrteq_v:
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Int = Ty->isFPOrFPVectorTy() ? LLVMIntrinsic : AltLLVMIntrinsic;
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return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, NameHint);
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case NEON::BI__builtin_neon_vrndi_v:
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case NEON::BI__builtin_neon_vrndiq_v:
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Int = Intrinsic::nearbyint;
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return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, NameHint);
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case NEON::BI__builtin_neon_vrshr_n_v:
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case NEON::BI__builtin_neon_vrshrq_n_v:
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return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshr_n",
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@ -7486,11 +7493,6 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
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Int = Intrinsic::nearbyint;
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return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndi");
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}
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case NEON::BI__builtin_neon_vrndi_v:
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case NEON::BI__builtin_neon_vrndiq_v: {
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Int = Intrinsic::nearbyint;
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return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndi");
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}
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case NEON::BI__builtin_neon_vrndmh_f16: {
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Ops.push_back(EmitScalarExpr(E->getArg(0)));
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Int = Intrinsic::floor;
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@ -7511,6 +7513,11 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
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Int = Intrinsic::aarch64_neon_frintn;
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return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndn");
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}
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case NEON::BI__builtin_neon_vrndns_f32: {
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Ops.push_back(EmitScalarExpr(E->getArg(0)));
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Int = Intrinsic::aarch64_neon_frintn;
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return EmitNeonCall(CGM.getIntrinsic(Int, FloatTy), Ops, "vrndn");
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}
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case NEON::BI__builtin_neon_vrndph_f16: {
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Ops.push_back(EmitScalarExpr(E->getArg(0)));
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Int = Intrinsic::ceil;
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@ -2253,22 +2253,6 @@ float64x2_t test_vcvt_high_f64_f32(float32x4_t a) {
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return vcvt_high_f64_f32(a);
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}
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// CHECK-LABEL: @test_vrndn_f32(
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// CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
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// CHECK: [[VRNDN1_I:%.*]] = call <2 x float> @llvm.aarch64.neon.frintn.v2f32(<2 x float> %a)
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// CHECK: ret <2 x float> [[VRNDN1_I]]
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float32x2_t test_vrndn_f32(float32x2_t a) {
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return vrndn_f32(a);
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}
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// CHECK-LABEL: @test_vrndnq_f32(
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// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
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// CHECK: [[VRNDN1_I:%.*]] = call <4 x float> @llvm.aarch64.neon.frintn.v4f32(<4 x float> %a)
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// CHECK: ret <4 x float> [[VRNDN1_I]]
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float32x4_t test_vrndnq_f32(float32x4_t a) {
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return vrndnq_f32(a);
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}
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// CHECK-LABEL: @test_vrndnq_f64(
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// CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to <16 x i8>
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// CHECK: [[VRNDN1_I:%.*]] = call <2 x double> @llvm.aarch64.neon.frintn.v2f64(<2 x double> %a)
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@ -2277,22 +2261,6 @@ float64x2_t test_vrndnq_f64(float64x2_t a) {
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return vrndnq_f64(a);
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}
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// CHECK-LABEL: @test_vrnda_f32(
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// CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
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// CHECK: [[VRNDA1_I:%.*]] = call <2 x float> @llvm.round.v2f32(<2 x float> %a)
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// CHECK: ret <2 x float> [[VRNDA1_I]]
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float32x2_t test_vrnda_f32(float32x2_t a) {
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return vrnda_f32(a);
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}
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// CHECK-LABEL: @test_vrndaq_f32(
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// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
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// CHECK: [[VRNDA1_I:%.*]] = call <4 x float> @llvm.round.v4f32(<4 x float> %a)
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// CHECK: ret <4 x float> [[VRNDA1_I]]
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float32x4_t test_vrndaq_f32(float32x4_t a) {
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return vrndaq_f32(a);
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}
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// CHECK-LABEL: @test_vrndaq_f64(
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// CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to <16 x i8>
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// CHECK: [[VRNDA1_I:%.*]] = call <2 x double> @llvm.round.v2f64(<2 x double> %a)
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@ -2301,22 +2269,6 @@ float64x2_t test_vrndaq_f64(float64x2_t a) {
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return vrndaq_f64(a);
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}
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// CHECK-LABEL: @test_vrndp_f32(
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// CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
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// CHECK: [[VRNDP1_I:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> %a)
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// CHECK: ret <2 x float> [[VRNDP1_I]]
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float32x2_t test_vrndp_f32(float32x2_t a) {
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return vrndp_f32(a);
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}
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// CHECK-LABEL: @test_vrndpq_f32(
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// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
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// CHECK: [[VRNDP1_I:%.*]] = call <4 x float> @llvm.ceil.v4f32(<4 x float> %a)
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// CHECK: ret <4 x float> [[VRNDP1_I]]
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float32x4_t test_vrndpq_f32(float32x4_t a) {
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return vrndpq_f32(a);
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}
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// CHECK-LABEL: @test_vrndpq_f64(
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// CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to <16 x i8>
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// CHECK: [[VRNDP1_I:%.*]] = call <2 x double> @llvm.ceil.v2f64(<2 x double> %a)
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@ -2325,22 +2277,6 @@ float64x2_t test_vrndpq_f64(float64x2_t a) {
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return vrndpq_f64(a);
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}
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// CHECK-LABEL: @test_vrndm_f32(
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// CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
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// CHECK: [[VRNDM1_I:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> %a)
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// CHECK: ret <2 x float> [[VRNDM1_I]]
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float32x2_t test_vrndm_f32(float32x2_t a) {
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return vrndm_f32(a);
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}
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// CHECK-LABEL: @test_vrndmq_f32(
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// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
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// CHECK: [[VRNDM1_I:%.*]] = call <4 x float> @llvm.floor.v4f32(<4 x float> %a)
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// CHECK: ret <4 x float> [[VRNDM1_I]]
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float32x4_t test_vrndmq_f32(float32x4_t a) {
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return vrndmq_f32(a);
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}
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// CHECK-LABEL: @test_vrndmq_f64(
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// CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to <16 x i8>
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// CHECK: [[VRNDM1_I:%.*]] = call <2 x double> @llvm.floor.v2f64(<2 x double> %a)
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@ -2349,22 +2285,6 @@ float64x2_t test_vrndmq_f64(float64x2_t a) {
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return vrndmq_f64(a);
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}
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// CHECK-LABEL: @test_vrndx_f32(
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// CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
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// CHECK: [[VRNDX1_I:%.*]] = call <2 x float> @llvm.rint.v2f32(<2 x float> %a)
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// CHECK: ret <2 x float> [[VRNDX1_I]]
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float32x2_t test_vrndx_f32(float32x2_t a) {
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return vrndx_f32(a);
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}
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// CHECK-LABEL: @test_vrndxq_f32(
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// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
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// CHECK: [[VRNDX1_I:%.*]] = call <4 x float> @llvm.rint.v4f32(<4 x float> %a)
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// CHECK: ret <4 x float> [[VRNDX1_I]]
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float32x4_t test_vrndxq_f32(float32x4_t a) {
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return vrndxq_f32(a);
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}
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// CHECK-LABEL: @test_vrndxq_f64(
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// CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to <16 x i8>
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// CHECK: [[VRNDX1_I:%.*]] = call <2 x double> @llvm.rint.v2f64(<2 x double> %a)
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@ -2373,22 +2293,6 @@ float64x2_t test_vrndxq_f64(float64x2_t a) {
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return vrndxq_f64(a);
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}
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// CHECK-LABEL: @test_vrnd_f32(
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// CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
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// CHECK: [[VRNDZ1_I:%.*]] = call <2 x float> @llvm.trunc.v2f32(<2 x float> %a)
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// CHECK: ret <2 x float> [[VRNDZ1_I]]
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float32x2_t test_vrnd_f32(float32x2_t a) {
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return vrnd_f32(a);
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}
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// CHECK-LABEL: @test_vrndq_f32(
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// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
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// CHECK: [[VRNDZ1_I:%.*]] = call <4 x float> @llvm.trunc.v4f32(<4 x float> %a)
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// CHECK: ret <4 x float> [[VRNDZ1_I]]
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float32x4_t test_vrndq_f32(float32x4_t a) {
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return vrndq_f32(a);
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}
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// CHECK-LABEL: @test_vrndq_f64(
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// CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to <16 x i8>
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// CHECK: [[VRNDZ1_I:%.*]] = call <2 x double> @llvm.trunc.v2f64(<2 x double> %a)
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@ -2397,22 +2301,6 @@ float64x2_t test_vrndq_f64(float64x2_t a) {
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return vrndq_f64(a);
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}
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// CHECK-LABEL: @test_vrndi_f32(
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// CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
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// CHECK: [[VRNDI1_I:%.*]] = call <2 x float> @llvm.nearbyint.v2f32(<2 x float> %a)
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// CHECK: ret <2 x float> [[VRNDI1_I]]
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float32x2_t test_vrndi_f32(float32x2_t a) {
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return vrndi_f32(a);
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}
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// CHECK-LABEL: @test_vrndiq_f32(
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// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
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// CHECK: [[VRNDI1_I:%.*]] = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %a)
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// CHECK: ret <4 x float> [[VRNDI1_I]]
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float32x4_t test_vrndiq_f32(float32x4_t a) {
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return vrndiq_f32(a);
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}
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// CHECK-LABEL: @test_vrndiq_f64(
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// CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to <16 x i8>
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// CHECK: [[VRNDI1_I:%.*]] = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> %a)
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@ -1,96 +1,128 @@
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// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 \
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// RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
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// RUN: opt -S -mem2reg | FileCheck %s
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// RUN: opt -S -mem2reg | FileCheck -check-prefixes=CHECK,CHECK-A32 %s
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// RUN: %clang_cc1 -triple arm64-linux-gnueabihf -target-feature +neon \
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// RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
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// RUN: opt -S -mem2reg | FileCheck -check-prefixes=CHECK,CHECK-A64 %s
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#include <arm_neon.h>
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// CHECK-LABEL: define <2 x float> @test_vrnda_f32(<2 x float> %a) #0 {
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// CHECK: [[VRNDA_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrinta.v2f32(<2 x float> %a) #2
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// CHECK: ret <2 x float> [[VRNDA_V1_I]]
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// CHECK-LABEL: define <2 x float> @test_vrnda_f32(<2 x float> %a)
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// CHECK-A32: [[VRNDA_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrinta.v2f32(<2 x float> %a)
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// CHECK-A64: [[VRNDA_V1_I:%.*]] = call <2 x float> @llvm.round.v2f32(<2 x float> %a)
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// CHECK: ret <2 x float> [[VRNDA_V1_I]]
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float32x2_t test_vrnda_f32(float32x2_t a) {
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return vrnda_f32(a);
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}
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// CHECK-LABEL: define <4 x float> @test_vrndaq_f32(<4 x float> %a) #0 {
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// CHECK: [[VRNDAQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrinta.v4f32(<4 x float> %a) #2
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// CHECK: ret <4 x float> [[VRNDAQ_V1_I]]
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// CHECK-LABEL: define <4 x float> @test_vrndaq_f32(<4 x float> %a)
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// CHECK-A32: [[VRNDAQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrinta.v4f32(<4 x float> %a)
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// CHECK-A64: [[VRNDAQ_V1_I:%.*]] = call <4 x float> @llvm.round.v4f32(<4 x float> %a)
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// CHECK: ret <4 x float> [[VRNDAQ_V1_I]]
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float32x4_t test_vrndaq_f32(float32x4_t a) {
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return vrndaq_f32(a);
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}
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// CHECK-LABEL: define <2 x float> @test_vrndm_f32(<2 x float> %a) #0 {
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// CHECK: [[VRNDM_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintm.v2f32(<2 x float> %a) #2
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// CHECK: ret <2 x float> [[VRNDM_V1_I]]
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// CHECK-LABEL: define <2 x float> @test_vrndm_f32(<2 x float> %a)
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// CHECK-A32: [[VRNDM_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintm.v2f32(<2 x float> %a)
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// CHECK-A64: [[VRNDM_V1_I:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> %a)
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// CHECK: ret <2 x float> [[VRNDM_V1_I]]
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float32x2_t test_vrndm_f32(float32x2_t a) {
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return vrndm_f32(a);
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}
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// CHECK-LABEL: define <4 x float> @test_vrndmq_f32(<4 x float> %a) #0 {
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// CHECK: [[VRNDMQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintm.v4f32(<4 x float> %a) #2
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// CHECK: ret <4 x float> [[VRNDMQ_V1_I]]
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// CHECK-LABEL: define <4 x float> @test_vrndmq_f32(<4 x float> %a)
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// CHECK-A32: [[VRNDMQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintm.v4f32(<4 x float> %a)
|
||||
// CHECK-A64: [[VRNDMQ_V1_I:%.*]] = call <4 x float> @llvm.floor.v4f32(<4 x float> %a)
|
||||
// CHECK: ret <4 x float> [[VRNDMQ_V1_I]]
|
||||
float32x4_t test_vrndmq_f32(float32x4_t a) {
|
||||
return vrndmq_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vrndn_f32(<2 x float> %a) #0 {
|
||||
// CHECK: [[VRNDN_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintn.v2f32(<2 x float> %a) #2
|
||||
// CHECK: ret <2 x float> [[VRNDN_V1_I]]
|
||||
// CHECK-LABEL: define <2 x float> @test_vrndn_f32(<2 x float> %a)
|
||||
// CHECK-A32: [[VRNDN_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintn.v2f32(<2 x float> %a)
|
||||
// CHECK-A64: [[VRNDN_V1_I:%.*]] = call <2 x float> @llvm.aarch64.neon.frintn.v2f32(<2 x float> %a)
|
||||
// CHECK: ret <2 x float> [[VRNDN_V1_I]]
|
||||
float32x2_t test_vrndn_f32(float32x2_t a) {
|
||||
return vrndn_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vrndnq_f32(<4 x float> %a) #0 {
|
||||
// CHECK: [[VRNDNQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintn.v4f32(<4 x float> %a) #2
|
||||
// CHECK: ret <4 x float> [[VRNDNQ_V1_I]]
|
||||
// CHECK-LABEL: define <4 x float> @test_vrndnq_f32(<4 x float> %a)
|
||||
// CHECK-A32: [[VRNDNQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintn.v4f32(<4 x float> %a)
|
||||
// CHECK-A64: [[VRNDNQ_V1_I:%.*]] = call <4 x float> @llvm.aarch64.neon.frintn.v4f32(<4 x float> %a)
|
||||
// CHECK: ret <4 x float> [[VRNDNQ_V1_I]]
|
||||
float32x4_t test_vrndnq_f32(float32x4_t a) {
|
||||
return vrndnq_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vrndp_f32(<2 x float> %a) #0 {
|
||||
// CHECK: [[VRNDP_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintp.v2f32(<2 x float> %a) #2
|
||||
// CHECK: ret <2 x float> [[VRNDP_V1_I]]
|
||||
// CHECK-LABEL: define <2 x float> @test_vrndp_f32(<2 x float> %a)
|
||||
// CHECK-A32: [[VRNDP_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintp.v2f32(<2 x float> %a)
|
||||
// CHECK-A64: [[VRNDP_V1_I:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> %a)
|
||||
// CHECK: ret <2 x float> [[VRNDP_V1_I]]
|
||||
float32x2_t test_vrndp_f32(float32x2_t a) {
|
||||
return vrndp_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vrndpq_f32(<4 x float> %a) #0 {
|
||||
// CHECK: [[VRNDPQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintp.v4f32(<4 x float> %a) #2
|
||||
// CHECK: ret <4 x float> [[VRNDPQ_V1_I]]
|
||||
// CHECK-LABEL: define <4 x float> @test_vrndpq_f32(<4 x float> %a)
|
||||
// CHECK-A32: [[VRNDPQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintp.v4f32(<4 x float> %a)
|
||||
// CHECK-A64: [[VRNDPQ_V1_I:%.*]] = call <4 x float> @llvm.ceil.v4f32(<4 x float> %a)
|
||||
// CHECK: ret <4 x float> [[VRNDPQ_V1_I]]
|
||||
float32x4_t test_vrndpq_f32(float32x4_t a) {
|
||||
return vrndpq_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vrndx_f32(<2 x float> %a) #0 {
|
||||
// CHECK: [[VRNDX_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintx.v2f32(<2 x float> %a) #2
|
||||
// CHECK: ret <2 x float> [[VRNDX_V1_I]]
|
||||
// CHECK-LABEL: define <2 x float> @test_vrndx_f32(<2 x float> %a)
|
||||
// CHECK-A32: [[VRNDX_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintx.v2f32(<2 x float> %a)
|
||||
// CHECK-A64: [[VRNDX_V1_I:%.*]] = call <2 x float> @llvm.rint.v2f32(<2 x float> %a)
|
||||
// CHECK: ret <2 x float> [[VRNDX_V1_I]]
|
||||
float32x2_t test_vrndx_f32(float32x2_t a) {
|
||||
return vrndx_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vrndxq_f32(<4 x float> %a) #0 {
|
||||
// CHECK: [[VRNDXQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintx.v4f32(<4 x float> %a) #2
|
||||
// CHECK: ret <4 x float> [[VRNDXQ_V1_I]]
|
||||
// CHECK-LABEL: define <4 x float> @test_vrndxq_f32(<4 x float> %a)
|
||||
// CHECK-A32: [[VRNDXQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintx.v4f32(<4 x float> %a)
|
||||
// CHECK-A64: [[VRNDXQ_V1_I:%.*]] = call <4 x float> @llvm.rint.v4f32(<4 x float> %a)
|
||||
// CHECK: ret <4 x float> [[VRNDXQ_V1_I]]
|
||||
float32x4_t test_vrndxq_f32(float32x4_t a) {
|
||||
return vrndxq_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vrnd_f32(<2 x float> %a) #0 {
|
||||
// CHECK: [[VRND_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintz.v2f32(<2 x float> %a) #2
|
||||
// CHECK: ret <2 x float> [[VRND_V1_I]]
|
||||
// CHECK-LABEL: define <2 x float> @test_vrnd_f32(<2 x float> %a)
|
||||
// CHECK-A32: [[VRND_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintz.v2f32(<2 x float> %a)
|
||||
// CHECK-A64: [[VRND_V1_I:%.*]] = call <2 x float> @llvm.trunc.v2f32(<2 x float> %a)
|
||||
// CHECK: ret <2 x float> [[VRND_V1_I]]
|
||||
float32x2_t test_vrnd_f32(float32x2_t a) {
|
||||
return vrnd_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vrndq_f32(<4 x float> %a) #0 {
|
||||
// CHECK: [[VRNDQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintz.v4f32(<4 x float> %a) #2
|
||||
// CHECK: ret <4 x float> [[VRNDQ_V1_I]]
|
||||
// CHECK-LABEL: define <4 x float> @test_vrndq_f32(<4 x float> %a)
|
||||
// CHECK-A32: [[VRNDQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintz.v4f32(<4 x float> %a)
|
||||
// CHECK-A64: [[VRNDQ_V1_I:%.*]] = call <4 x float> @llvm.trunc.v4f32(<4 x float> %a)
|
||||
// CHECK: ret <4 x float> [[VRNDQ_V1_I]]
|
||||
float32x4_t test_vrndq_f32(float32x4_t a) {
|
||||
return vrndq_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define float @test_vrndns_f32(float %a) #0 {
|
||||
// CHECK: [[VRNDN_I:%.*]] = call float @llvm.arm.neon.vrintn.f32(float %a) #2
|
||||
// CHECK: ret float [[VRNDN_I]]
|
||||
// CHECK-LABEL: define float @test_vrndns_f32(float %a)
|
||||
// CHECK-A32: [[VRNDN_I:%.*]] = call float @llvm.arm.neon.vrintn.f32(float %a)
|
||||
// CHECK-A64: [[VRNDN_I:%.*]] = call float @llvm.aarch64.neon.frintn.f32(float %a)
|
||||
// CHECK: ret float [[VRNDN_I]]
|
||||
float32_t test_vrndns_f32(float32_t a) {
|
||||
return vrndns_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vrndi_f32(<2 x float> %a)
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
|
||||
// CHECK: [[VRNDI1_I:%.*]] = call <2 x float> @llvm.nearbyint.v2f32(<2 x float> %a)
|
||||
// CHECK: ret <2 x float> [[VRNDI1_I]]
|
||||
float32x2_t test_vrndi_f32(float32x2_t a) {
|
||||
return vrndi_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vrndiq_f32(<4 x float> %a)
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
|
||||
// CHECK: [[VRNDI1_I:%.*]] = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %a)
|
||||
// CHECK: ret <4 x float> [[VRNDI1_I]]
|
||||
float32x4_t test_vrndiq_f32(float32x4_t a) {
|
||||
return vrndiq_f32(a);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,50 +2,21 @@
|
|||
|
||||
#include <arm_neon.h>
|
||||
|
||||
int32x2_t rnd1(float32x2_t a) { return vrnd_f32(a); }
|
||||
// CHECK: call <2 x float> @llvm.trunc.v2f32(<2 x float>
|
||||
int32x4_t rnd3(float32x4_t a) { return vrndq_f32(a); }
|
||||
// CHECK: call <4 x float> @llvm.trunc.v4f32(<4 x float>
|
||||
int64x2_t rnd5(float64x2_t a) { return vrndq_f64(a); }
|
||||
// CHECK: call <2 x double> @llvm.trunc.v2f64(<2 x double>
|
||||
|
||||
|
||||
int32x2_t rnd7(float32x2_t a) { return vrndn_f32(a); }
|
||||
// CHECK: call <2 x float> @llvm.aarch64.neon.frintn.v2f32(<2 x float>
|
||||
int32x4_t rnd8(float32x4_t a) { return vrndnq_f32(a); }
|
||||
// CHECK: call <4 x float> @llvm.aarch64.neon.frintn.v4f32(<4 x float>
|
||||
int64x2_t rnd9(float64x2_t a) { return vrndnq_f64(a); }
|
||||
// CHECK: call <2 x double> @llvm.aarch64.neon.frintn.v2f64(<2 x double>
|
||||
int64x2_t rnd10(float64x2_t a) { return vrndnq_f64(a); }
|
||||
// CHECK: call <2 x double> @llvm.aarch64.neon.frintn.v2f64(<2 x double>
|
||||
|
||||
int32x2_t rnd11(float32x2_t a) { return vrndm_f32(a); }
|
||||
// CHECK: call <2 x float> @llvm.floor.v2f32(<2 x float>
|
||||
int32x4_t rnd12(float32x4_t a) { return vrndmq_f32(a); }
|
||||
// CHECK: call <4 x float> @llvm.floor.v4f32(<4 x float>
|
||||
int64x2_t rnd13(float64x2_t a) { return vrndmq_f64(a); }
|
||||
// CHECK: call <2 x double> @llvm.floor.v2f64(<2 x double>
|
||||
int64x2_t rnd14(float64x2_t a) { return vrndmq_f64(a); }
|
||||
// CHECK: call <2 x double> @llvm.floor.v2f64(<2 x double>
|
||||
|
||||
int32x2_t rnd15(float32x2_t a) { return vrndp_f32(a); }
|
||||
// CHECK: call <2 x float> @llvm.ceil.v2f32(<2 x float>
|
||||
int32x4_t rnd16(float32x4_t a) { return vrndpq_f32(a); }
|
||||
// CHECK: call <4 x float> @llvm.ceil.v4f32(<4 x float>
|
||||
int64x2_t rnd18(float64x2_t a) { return vrndpq_f64(a); }
|
||||
// CHECK: call <2 x double> @llvm.ceil.v2f64(<2 x double>
|
||||
|
||||
int32x2_t rnd19(float32x2_t a) { return vrnda_f32(a); }
|
||||
// CHECK: call <2 x float> @llvm.round.v2f32(<2 x float>
|
||||
int32x4_t rnd20(float32x4_t a) { return vrndaq_f32(a); }
|
||||
// CHECK: call <4 x float> @llvm.round.v4f32(<4 x float>
|
||||
int64x2_t rnd22(float64x2_t a) { return vrndaq_f64(a); }
|
||||
// CHECK: call <2 x double> @llvm.round.v2f64(<2 x double>
|
||||
|
||||
int32x2_t rnd23(float32x2_t a) { return vrndx_f32(a); }
|
||||
// CHECK: call <2 x float> @llvm.rint.v2f32(<2 x float>
|
||||
int32x4_t rnd24(float32x4_t a) { return vrndxq_f32(a); }
|
||||
// CHECK: call <4 x float> @llvm.rint.v4f32(<4 x float>
|
||||
int64x2_t rnd25(float64x2_t a) { return vrndxq_f64(a); }
|
||||
// CHECK: call <2 x double> @llvm.rint.v2f64(<2 x double>
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue