diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td
index 11ea1c06db59..ee60b9f5abd0 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.td
+++ b/llvm/lib/Target/X86/X86InstrInfo.td
@@ -266,6 +266,20 @@ def loadi32 : PatFrag<(ops node:$ptr), (i32 (ld node:$ptr)), [{
   return false;
 }]>;
 
+def nvloadi32 : PatFrag<(ops node:$ptr), (i32 (ld node:$ptr)), [{
+  LoadSDNode *LD = cast<LoadSDNode>(N);
+  if (LD->isVolatile())
+    return false;
+  if (LD->getAddressingMode() != ISD::UNINDEXED)
+    return false;
+  ISD::LoadExtType ExtType = LD->getExtensionType();
+  if (ExtType == ISD::NON_EXTLOAD)
+    return true;
+  if (ExtType == ISD::EXTLOAD)
+    return LD->getAlignment() >= 4;
+  return false;
+}]>;
+
 def loadi8  : PatFrag<(ops node:$ptr), (i8  (load node:$ptr))>;
 def loadi64 : PatFrag<(ops node:$ptr), (i64 (load node:$ptr))>;
 
@@ -2812,8 +2826,10 @@ def : Pat<(i32 (anyext GR16:$src)),
           (INSERT_SUBREG (i32 (IMPLICIT_DEF)), GR16:$src, x86_subreg_16bit)>;
 
 // (and (i32 load), 255) -> (zextload i8)
-def : Pat<(i32 (and (loadi32 addr:$src), (i32 255))), (MOVZX32rm8 addr:$src)>;
-def : Pat<(i32 (and (loadi32 addr:$src), (i32 65535))),(MOVZX32rm16 addr:$src)>;
+def : Pat<(i32 (and (nvloadi32 addr:$src), (i32 255))),
+          (MOVZX32rm8 addr:$src)>;
+def : Pat<(i32 (and (nvloadi32 addr:$src), (i32 65535))),
+          (MOVZX32rm16 addr:$src)>;
 
 //===----------------------------------------------------------------------===//
 // Some peepholes
diff --git a/llvm/test/CodeGen/X86/2008-09-29-VolatileBug.ll b/llvm/test/CodeGen/X86/2008-09-29-VolatileBug.ll
new file mode 100644
index 000000000000..4f6eb59773fb
--- /dev/null
+++ b/llvm/test/CodeGen/X86/2008-09-29-VolatileBug.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llc -march=x86 | not grep movz
+; PR2835
+
+@g_407 = internal global i32 0		; <i32*> [#uses=1]
+@llvm.used = appending global [1 x i8*] [ i8* bitcast (i32 ()* @main to i8*) ], section "llvm.metadata"		; <[1 x i8*]*> [#uses=0]
+
+define i32 @main() nounwind {
+entry:
+	%0 = volatile load i32* @g_407, align 4		; <i32> [#uses=1]
+	%1 = trunc i32 %0 to i8		; <i8> [#uses=1]
+	%2 = tail call i32 @func_45(i8 zeroext %1) nounwind		; <i32> [#uses=0]
+	ret i32 0
+}
+
+declare i32 @func_45(i8 zeroext) nounwind