replica
/
hanchenye-llvm-project
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Fix PR2835. Do not change the width of a volatile load. 

llvm-svn: 56792
This commit is contained in:
Evan Cheng 2008-09-29 17:26:18 +00:00
parent 03fc762a02
commit 82237f2f42
2 changed files with 33 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
llvm/lib/Target/X86/X86InstrInfo.td
View File

@ -266,6 +266,20 @@ def loadi32 : PatFrag<(ops node:$ptr), (i32 (ld node:$ptr)), [{
return false;
}]>;
def nvloadi32 : PatFrag<(ops node:$ptr), (i32 (ld node:$ptr)), [{
LoadSDNode *LD = cast<LoadSDNode>(N);
if (LD->isVolatile())
return false;
if (LD->getAddressingMode() != ISD::UNINDEXED)
return false;
ISD::LoadExtType ExtType = LD->getExtensionType();
if (ExtType == ISD::NON_EXTLOAD)
return true;
if (ExtType == ISD::EXTLOAD)
return LD->getAlignment() >= 4;
return false;
}]>;
def loadi8 : PatFrag<(ops node:$ptr), (i8 (load node:$ptr))>;
def loadi64 : PatFrag<(ops node:$ptr), (i64 (load node:$ptr))>;
@ -2812,8 +2826,10 @@ def : Pat<(i32 (anyext GR16:$src)),
(INSERT_SUBREG (i32 (IMPLICIT_DEF)), GR16:$src, x86_subreg_16bit)>;
// (and (i32 load), 255) -> (zextload i8)
def : Pat<(i32 (and (loadi32 addr:$src), (i32 255))), (MOVZX32rm8 addr:$src)>;
def : Pat<(i32 (and (loadi32 addr:$src), (i32 65535))),(MOVZX32rm16 addr:$src)>;
def : Pat<(i32 (and (nvloadi32 addr:$src), (i32 255))),
(MOVZX32rm8 addr:$src)>;
def : Pat<(i32 (and (nvloadi32 addr:$src), (i32 65535))),
(MOVZX32rm16 addr:$src)>;
//===----------------------------------------------------------------------===//
// Some peepholes

15
llvm/test/CodeGen/X86/2008-09-29-VolatileBug.ll Normal file
View File

@ -0,0 +1,15 @@
; RUN: llvm-as < %s | llc -march=x86 | not grep movz
; PR2835
@g_407 = internal global i32 0 ; <i32*> [#uses=1]
@llvm.used = appending global [1 x i8*] [ i8* bitcast (i32 ()* @main to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
define i32 @main() nounwind {
entry:
%0 = volatile load i32* @g_407, align 4 ; <i32> [#uses=1]
%1 = trunc i32 %0 to i8 ; <i8> [#uses=1]
%2 = tail call i32 @func_45(i8 zeroext %1) nounwind ; <i32> [#uses=0]
ret i32 0
}
declare i32 @func_45(i8 zeroext) nounwind