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Rename t2 TBB and TBH instructions to reference that they encode the jump table 

data. Next up, pseudo-izing them.

llvm-svn: 120320
This commit is contained in:
Jim Grosbach 2010-11-29 21:28:32 +00:00
parent 40a80ac963
commit 81af4f9eb1
6 changed files with 15 additions and 15 deletions
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10
llvm/lib/Target/ARM/ARMAsmPrinter.cpp
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@ -740,9 +740,9 @@ void ARMAsmPrinter::EmitJump2Table(const MachineInstr *MI) {
const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables(); const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs; const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
unsigned OffsetWidth = 4; unsigned OffsetWidth = 4;
if (MI->getOpcode() == ARM::t2TBB) if (MI->getOpcode() == ARM::t2TBB_JT)
OffsetWidth = 1; OffsetWidth = 1;
else if (MI->getOpcode() == ARM::t2TBH) else if (MI->getOpcode() == ARM::t2TBH_JT)
OffsetWidth = 2; OffsetWidth = 2;
for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) { for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
@ -777,7 +777,7 @@ void ARMAsmPrinter::EmitJump2Table(const MachineInstr *MI) {
// Make sure the instruction that follows TBB is 2-byte aligned. // Make sure the instruction that follows TBB is 2-byte aligned.
// FIXME: Constant island pass should insert an "ALIGN" instruction instead. // FIXME: Constant island pass should insert an "ALIGN" instruction instead.
if (MI->getOpcode() == ARM::t2TBB) if (MI->getOpcode() == ARM::t2TBB_JT)
EmitAlignment(1); EmitAlignment(1);
} }
@ -924,8 +924,8 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
return; return;
} }
case ARM::t2TBB: case ARM::t2TBB_JT:
case ARM::t2TBH: case ARM::t2TBH_JT:
case ARM::t2BR_JT: { case ARM::t2BR_JT: {
// Lower and emit the instruction itself, then the jump table following it. // Lower and emit the instruction itself, then the jump table following it.
MCInst TmpInst; MCInst TmpInst;

10
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
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@ -518,13 +518,13 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
case ARM::BR_JTadd: case ARM::BR_JTadd:
case ARM::tBR_JTr: case ARM::tBR_JTr:
case ARM::t2BR_JT: case ARM::t2BR_JT:
case ARM::t2TBB: case ARM::t2TBB_JT:
case ARM::t2TBH: { case ARM::t2TBH_JT: {
// These are jumptable branches, i.e. a branch followed by an inlined // These are jumptable branches, i.e. a branch followed by an inlined
// jumptable. The size is 4 + 4 * number of entries. For TBB, each // jumptable. The size is 4 + 4 * number of entries. For TBB, each
// entry is one byte; TBH two byte each. // entry is one byte; TBH two byte each.
unsigned EntrySize = (Opc == ARM::t2TBB) unsigned EntrySize = (Opc == ARM::t2TBB_JT)
? 1 : ((Opc == ARM::t2TBH) ? 2 : 4); ? 1 : ((Opc == ARM::t2TBH_JT) ? 2 : 4);
unsigned NumOps = TID.getNumOperands(); unsigned NumOps = TID.getNumOperands();
MachineOperand JTOP = MachineOperand JTOP =
MI->getOperand(NumOps - (TID.isPredicable() ? 3 : 2)); MI->getOperand(NumOps - (TID.isPredicable() ? 3 : 2));
@ -542,7 +542,7 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
// alignment issue. // alignment issue.
unsigned InstSize = (Opc == ARM::tBR_JTr || Opc == ARM::t2BR_JT) ? 2 : 4; unsigned InstSize = (Opc == ARM::tBR_JTr || Opc == ARM::t2BR_JT) ? 2 : 4;
unsigned NumEntries = getNumJTEntries(JT, JTI); unsigned NumEntries = getNumJTEntries(JT, JTI);
if (Opc == ARM::t2TBB && (NumEntries & 1)) if (Opc == ARM::t2TBB_JT && (NumEntries & 1))
// Make sure the instruction that follows TBB is 2-byte aligned. // Make sure the instruction that follows TBB is 2-byte aligned.
// FIXME: Constant island pass should insert an "ALIGN" instruction // FIXME: Constant island pass should insert an "ALIGN" instruction
// instead. // instead.

2
llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
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@ -1766,7 +1766,7 @@ bool ARMConstantIslands::OptimizeThumb2JumpTables(MachineFunction &MF) {
if (!OptOk) if (!OptOk)
continue; continue;
unsigned Opc = ByteOk ? ARM::t2TBB : ARM::t2TBH; unsigned Opc = ByteOk ? ARM::t2TBB_JT : ARM::t2TBH_JT;
MachineInstr *NewJTMI = BuildMI(MBB, MI->getDebugLoc(), TII->get(Opc)) MachineInstr *NewJTMI = BuildMI(MBB, MI->getDebugLoc(), TII->get(Opc))
.addReg(IdxReg, getKillRegState(IdxRegKill)) .addReg(IdxReg, getKillRegState(IdxRegKill))
.addJumpTableIndex(JTI, JTOP.getTargetFlags()) .addJumpTableIndex(JTI, JTOP.getTargetFlags())

4
llvm/lib/Target/ARM/ARMInstrThumb2.td
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@ -2947,7 +2947,7 @@ def t2BR_JT :
// FIXME: Add a non-pc based case that can be predicated. // FIXME: Add a non-pc based case that can be predicated.
let isCodeGenOnly = 1 in // $id doesn't exist in asm string, should be lowered. let isCodeGenOnly = 1 in // $id doesn't exist in asm string, should be lowered.
def t2TBB : def t2TBB_JT :
T2JTI<(outs), T2JTI<(outs),
(ins tb_addrmode:$index, jt2block_operand:$jt, i32imm:$id), (ins tb_addrmode:$index, jt2block_operand:$jt, i32imm:$id),
IIC_Br, "tbb\t$index$jt", []> { IIC_Br, "tbb\t$index$jt", []> {
@ -2959,7 +2959,7 @@ def t2TBB :
} }
let isCodeGenOnly = 1 in // $id doesn't exist in asm string, should be lowered. let isCodeGenOnly = 1 in // $id doesn't exist in asm string, should be lowered.
def t2TBH : def t2TBH_JT :
T2JTI<(outs), T2JTI<(outs),
(ins tb_addrmode:$index, jt2block_operand:$jt, i32imm:$id), (ins tb_addrmode:$index, jt2block_operand:$jt, i32imm:$id),
IIC_Br, "tbh\t$index$jt", []> { IIC_Br, "tbh\t$index$jt", []> {

2
llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
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@ -531,7 +531,7 @@ void ARMInstPrinter::printThumbAddrModeSPOperand(const MCInst *MI, unsigned Op,
void ARMInstPrinter::printTBAddrMode(const MCInst *MI, unsigned OpNum, void ARMInstPrinter::printTBAddrMode(const MCInst *MI, unsigned OpNum,
raw_ostream &O) { raw_ostream &O) {
O << "[pc, " << getRegisterName(MI->getOperand(OpNum).getReg()); O << "[pc, " << getRegisterName(MI->getOperand(OpNum).getReg());
if (MI->getOpcode() == ARM::t2TBH) if (MI->getOpcode() == ARM::t2TBH_JT)
O << ", lsl #1"; O << ", lsl #1";
O << ']'; O << ']';
} }

2
llvm/utils/TableGen/ARMDecoderEmitter.cpp
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@ -1719,7 +1719,7 @@ bool ARMDecoderEmitter::ARMDEBackend::populateInstruction(
return false; return false;
// Ignore t2TBB, t2TBH and prefer the generic t2TBBgen, t2TBHgen. // Ignore t2TBB, t2TBH and prefer the generic t2TBBgen, t2TBHgen.
if (Name == "t2TBB" || Name == "t2TBH") if (Name == "t2TBB_JT" || Name == "t2TBH_JT")
return false; return false;
// Resolve conflicts: // Resolve conflicts: