From 7d0a77b9790364ed1c62ca4309ffa3f1a383de39 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 2 Mar 2016 01:36:51 +0000 Subject: [PATCH] DAGCombiner: Make sure an integer is being truncated llvm-svn: 262446 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 +- .../CodeGen/AMDGPU/extractelt-to-trunc.ll | 29 ++++++++++++++++++- 2 files changed, 29 insertions(+), 2 deletions(-) diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index cde38e479ac8..216389ac42a6 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -12198,7 +12198,7 @@ SDValue DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) { // extract_vector_elt (v2i32 (bitcast i64:x)), 0 -> i32 (trunc i64:x) if (ConstEltNo && InVec.getOpcode() == ISD::BITCAST && InVec.hasOneUse() && - ConstEltNo->isNullValue()) { + ConstEltNo->isNullValue() && VT.isInteger()) { SDValue BCSrc = InVec.getOperand(0); if (BCSrc.getValueType().isScalarInteger()) return DAG.getNode(ISD::TRUNCATE, SDLoc(N), NVT, BCSrc); diff --git a/llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll b/llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll index 57a7c5254bb1..992ab5b389e1 100644 --- a/llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll +++ b/llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll @@ -13,5 +13,32 @@ define void @bitcast_int_to_vector_extract_0(i32 addrspace(1)* %out, i64 addrspa %val.bc = bitcast i64 %add to <2 x i32> %extract = extractelement <2 x i32> %val.bc, i32 0 store i32 %extract, i32 addrspace(1)* %out - ret void + ret void +} + +; GCN-LABEL: {{^}}bitcast_fp_to_vector_extract_0: +; GCN: buffer_load_dwordx2 +; GCN: v_add_f64 +; GCN: buffer_store_dword v +define void @bitcast_fp_to_vector_extract_0(i32 addrspace(1)* %out, double addrspace(1)* %in, double %b) { + %a = load double, double addrspace(1)* %in + %add = fadd double %a, %b + %val.bc = bitcast double %add to <2 x i32> + %extract = extractelement <2 x i32> %val.bc, i32 0 + store i32 %extract, i32 addrspace(1)* %out + ret void +} + +; GCN-LABEL: {{^}}bitcast_int_to_fpvector_extract_0: +; GCN: buffer_load_dwordx2 +; GCN: v_add_i32 +; GCN: v_addc_u32 +; GCN: buffer_store_dword +define void @bitcast_int_to_fpvector_extract_0(float addrspace(1)* %out, i64 addrspace(1)* %in, i64 %b) { + %a = load i64, i64 addrspace(1)* %in + %add = add i64 %a, %b + %val.bc = bitcast i64 %add to <2 x float> + %extract = extractelement <2 x float> %val.bc, i32 0 + store float %extract, float addrspace(1)* %out + ret void }