From 7b4a1a221bd19fd1f9d0dac7857d97e22f91a72e Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Fri, 26 Mar 2010 00:07:25 +0000 Subject: [PATCH] Try trivial remat before the coalescer gives up on a vr / physreg coalescing for fear of tying up a physical register. llvm-svn: 99575 --- llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp | 8 +++++++- llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll | 9 +++++++++ llvm/test/CodeGen/X86/phys_subreg_coalesce-2.ll | 2 +- llvm/test/CodeGen/X86/pr2659.ll | 8 +++++++- 4 files changed, 24 insertions(+), 3 deletions(-) diff --git a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp index f51bedd3347f..15ca3740b8f2 100644 --- a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -1664,7 +1664,8 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { if (JoinPInt.ranges.size() > 1000) { mri_->setRegAllocationHint(JoinVInt.reg, 0, JoinPReg); ++numAborts; - DEBUG(dbgs() << "\tPhysical register too complicated, abort!\n"); + DEBUG(dbgs() + << "\tPhysical register live interval too complicated, abort!\n"); return false; } @@ -1675,6 +1676,11 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { if (Length > Threshold && (((float)std::distance(mri_->use_nodbg_begin(JoinVReg), mri_->use_nodbg_end()) / Length) < Ratio)) { + // Before giving up coalescing, if definition of source is defined by + // trivial computation, try rematerializing it. + if (ReMaterializeTrivialDef(SrcInt, DstReg, DstSubIdx, CopyMI)) + return true; + mri_->setRegAllocationHint(JoinVInt.reg, 0, JoinPReg); ++numAborts; DEBUG(dbgs() << "\tMay tie down a physical register, abort!\n"); diff --git a/llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll b/llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll index ae723f0c299e..d9655fd19b3c 100644 --- a/llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll +++ b/llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll @@ -1,5 +1,7 @@ ; RUN: llc < %s -march=x86-64 -mattr=+sse3 -stats |& grep {2 machine-licm} +; RUN: llc < %s -march=x86-64 -mattr=+sse3 | FileCheck %s ; rdar://6627786 +; rdar://7792037 target triple = "x86_64-apple-darwin10.0" %struct.Key = type { i64 } @@ -11,6 +13,13 @@ entry: br label %bb4 bb4: ; preds = %bb.i, %bb26, %bb4, %entry +; CHECK: %bb4 +; CHECK: xorb +; CHECK: callq +; CHECK: movq +; CHECK: xorl +; CHECK: xorb + %0 = call i32 (...)* @xxGetOffsetForCode(i32 undef) nounwind ; [#uses=0] %ins = or i64 %p, 2097152 ; [#uses=1] %1 = call i32 (...)* @xxCalculateMidType(%struct.Key* %desc, i32 0) nounwind ; [#uses=1] diff --git a/llvm/test/CodeGen/X86/phys_subreg_coalesce-2.ll b/llvm/test/CodeGen/X86/phys_subreg_coalesce-2.ll index 60ec2645c28b..23c509c9936b 100644 --- a/llvm/test/CodeGen/X86/phys_subreg_coalesce-2.ll +++ b/llvm/test/CodeGen/X86/phys_subreg_coalesce-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep mov | count 6 +; RUN: llc < %s -march=x86 | grep mov | count 5 ; PR2659 define i32 @binomial(i32 %n, i32 %k) nounwind { diff --git a/llvm/test/CodeGen/X86/pr2659.ll b/llvm/test/CodeGen/X86/pr2659.ll index 01bb9f14f641..27047dfdfd8c 100644 --- a/llvm/test/CodeGen/X86/pr2659.ll +++ b/llvm/test/CodeGen/X86/pr2659.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin9.4.0 | grep movl | count 6 +; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin9.4.0 | grep movl | count 5 +; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin9.4.0 | FileCheck %s ; PR2659 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" @@ -13,6 +14,11 @@ forcond.preheader: ; preds = %entry %cmp44 = icmp eq i32 %k, 0 ; [#uses=1] br i1 %cmp44, label %afterfor, label %forbody +; CHECK: %forcond.preheader.forbody_crit_edge +; CHECK: movl $1 +; CHECK-NOT: xorl +; CHECK-NEXT: movl $1 + ifthen: ; preds = %entry ret i32 0