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[x86] Add a comment clarifying that this test should span all manners of 

generic DAG combining of shuffles relevant to x86.

My plan is to fold a bunch of the other DAG combining test cases into
this one, while converting them to use the nice new FileCheck assertion
syntax.

llvm-svn: 218855
This commit is contained in:
Chandler Carruth 2014-10-02 07:13:25 +00:00
parent c1bb0e84bc
commit 7b2706726e
1 changed files with 5 additions and 0 deletions
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5
llvm/test/CodeGen/X86/vector-shuffle-combining.ll
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@ -1,4 +1,9 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=CHECK-SSE2
;
; Verify that the DAG combiner correctly folds bitwise operations across
; shuffles, nested shuffles with undef, pairs of nested shuffles, and other
; basic and always-safe patterns. Also test that the DAG combiner will combine
; target-specific shuffle instructions where reasonable.
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"