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Have getCalleeSavedRegs take a non-null MachineFunction all the 

time. The target independent code was passing in one all the
time and targets weren't checking validity before using. Update
a few calls to pass in a MachineFunction where necessary.

llvm-svn: 231970
This commit is contained in:
Eric Christopher 2015-03-11 21:41:28 +00:00
parent d987cd2f31
commit 7af9528747
17 changed files with 20 additions and 29 deletions
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2
llvm/include/llvm/Target/TargetRegisterInfo.h
View File

@ -425,7 +425,7 @@ public:
/// closest to the incoming stack pointer if stack grows down, and vice versa.
///
virtual const MCPhysReg*
getCalleeSavedRegs(const MachineFunction *MF = nullptr) const = 0;
getCalleeSavedRegs(const MachineFunction *MF) const = 0;
/// getCallPreservedMask - Return a mask of call-preserved registers for the
/// given calling convention on the current sub-target. The mask should

3
llvm/lib/Target/AArch64/AArch64RegisterInfo.h
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@ -36,8 +36,7 @@ public:
bool isReservedReg(const MachineFunction &MF, unsigned Reg) const;
/// Code Generation virtual methods...
const MCPhysReg *
getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override;
const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
const uint32_t *getCallPreservedMask(CallingConv::ID) const override;
unsigned getCSRFirstUseCost() const override {

2
llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
View File

@ -63,8 +63,6 @@ ARMBaseRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
const MCPhysReg *RegList =
STI.isTargetDarwin() ? CSR_iOS_SaveList : CSR_AAPCS_SaveList;
if (!MF) return RegList;
const Function *F = MF->getFunction();
if (F->getCallingConv() == CallingConv::GHC) {
// GHC set of callee saved regs is empty as all those regs are

3
llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
View File

@ -100,8 +100,7 @@ protected:
public:
/// Code Generation virtual methods...
const MCPhysReg *
getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override;
const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
const uint32_t *getCallPreservedMask(CallingConv::ID) const override;
const uint32_t *getNoPreservedMask() const;

2
llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
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@ -336,7 +336,7 @@ void Thumb1FrameLowering::emitEpilogue(MachineFunction &MF,
int NumBytes = (int)MFI->getStackSize();
assert((unsigned)NumBytes >= ArgRegsSaveSize &&
"ArgRegsSaveSize is included in NumBytes");
const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs();
const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF);
unsigned FramePtr = RegInfo->getFrameRegister(MF);
if (!AFI->hasStackFrame()) {

3
llvm/lib/Target/BPF/BPFRegisterInfo.h
View File

@ -25,8 +25,7 @@ struct BPFRegisterInfo : public BPFGenRegisterInfo {
BPFRegisterInfo();
const MCPhysReg *
getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override;
const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
BitVector getReservedRegs(const MachineFunction &MF) const override;

3
llvm/lib/Target/Hexagon/HexagonRegisterInfo.h
View File

@ -46,8 +46,7 @@ struct HexagonRegisterInfo : public HexagonGenRegisterInfo {
HexagonRegisterInfo();
/// Code Generation virtual methods...
const MCPhysReg *
getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override;
const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
const TargetRegisterClass* const*
getCalleeSavedRegClasses(const MachineFunction *MF = nullptr) const;

4
llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
View File

@ -389,7 +389,9 @@ static bool IsLoopN(MachineInstr *MI) {
/// callee-saved register.
static bool DoesModifyCalleeSavedReg(MachineInstr *MI,
const TargetRegisterInfo *TRI) {
for (const MCPhysReg *CSR = TRI->getCalleeSavedRegs(); *CSR; ++CSR) {
for (const MCPhysReg *CSR =
TRI->getCalleeSavedRegs(MI->getParent()->getParent());
*CSR; ++CSR) {
unsigned CalleeSavedReg = *CSR;
if (MI->modifiesRegister(CalleeSavedReg, TRI))
return true;

3
llvm/lib/Target/MSP430/MSP430RegisterInfo.h
View File

@ -26,8 +26,7 @@ public:
MSP430RegisterInfo();
/// Code Generation virtual methods...
const MCPhysReg *
getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override;
const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
BitVector getReservedRegs(const MachineFunction &MF) const override;
const TargetRegisterClass*

3
llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
View File

@ -321,7 +321,8 @@ void RegDefsUses::setCallerSaved(const MachineInstr &MI) {
CallerSavedRegs.reset(Mips::ZERO);
CallerSavedRegs.reset(Mips::ZERO_64);
for (const MCPhysReg *R = TRI.getCalleeSavedRegs(); *R; ++R)
for (const MCPhysReg *R = TRI.getCalleeSavedRegs(MI.getParent()->getParent());
*R; ++R)
for (MCRegAliasIterator AI(*R, &TRI, true); AI.isValid(); ++AI)
CallerSavedRegs.reset(*AI);

3
llvm/lib/Target/Mips/MipsRegisterInfo.h
View File

@ -47,8 +47,7 @@ public:
unsigned getRegPressureLimit(const TargetRegisterClass *RC,
MachineFunction &MF) const override;
const MCPhysReg *
getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override;
const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
const uint32_t *getCallPreservedMask(CallingConv::ID) const override;
static const uint32_t *getMips16RetHelperMask();

2
llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
View File

@ -78,7 +78,7 @@ NVPTXRegisterInfo::NVPTXRegisterInfo() : NVPTXGenRegisterInfo(0) {}
/// NVPTX Callee Saved Registers
const MCPhysReg *
NVPTXRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
NVPTXRegisterInfo::getCalleeSavedRegs(const MachineFunction *) const {
static const MCPhysReg CalleeSavedRegs[] = { 0 };
return CalleeSavedRegs;
}

3
llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h
View File

@ -35,8 +35,7 @@ public:
//------------------------------------------------------
// NVPTX callee saved registers
const MCPhysReg *
getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override;
const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
BitVector getReservedRegs(const MachineFunction &MF) const override;

3
llvm/lib/Target/Sparc/SparcRegisterInfo.h
View File

@ -31,8 +31,7 @@ struct SparcRegisterInfo : public SparcGenRegisterInfo {
SparcRegisterInfo(SparcSubtarget &st);
/// Code Generation virtual methods...
const MCPhysReg *
getCalleeSavedRegs(const MachineFunction *MF =nullptr) const override;
const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
const uint32_t* getCallPreservedMask(CallingConv::ID CC) const override;
const uint32_t* getRTCallPreservedMask(CallingConv::ID CC) const;

3
llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
View File

@ -43,8 +43,7 @@ public:
bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override {
return true;
}
const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF = nullptr) const
override;
const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
const uint32_t *getCallPreservedMask(CallingConv::ID CC) const override;
BitVector getReservedRegs(const MachineFunction &MF) const override;
void eliminateFrameIndex(MachineBasicBlock::iterator MI,

4
llvm/lib/Target/XCore/XCoreRegisterInfo.cpp
View File

@ -208,8 +208,8 @@ bool XCoreRegisterInfo::needsFrameMoves(const MachineFunction &MF) {
MF.getFunction()->needsUnwindTableEntry();
}
const MCPhysReg* XCoreRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF)
const {
const MCPhysReg *
XCoreRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
// The callee saved registers LR & FP are explicitly handled during
// emitPrologue & emitEpilogue and related functions.
static const MCPhysReg CalleeSavedRegs[] = {

3
llvm/lib/Target/XCore/XCoreRegisterInfo.h
View File

@ -29,8 +29,7 @@ public:
/// Code Generation virtual methods...
const MCPhysReg *
getCalleeSavedRegs(const MachineFunction *MF =nullptr) const override;
const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
BitVector getReservedRegs(const MachineFunction &MF) const override;