Check early if this is an unsupported opcode, so that we can avoid needlessly instantiating the base register in some cases.
llvm-svn: 128481
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@ -308,6 +308,10 @@ ARMLoadStoreOpt::MergeOps(MachineBasicBlock &MBB,
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// VLDM/VSTM do not support DB mode without also updating the base reg.
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Mode = ARM_AM::db;
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else if (Offset != 0) {
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// Check if this is a supported opcode before we insert instructions to
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// calculate a new base register.
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if (!getLoadStoreMultipleOpcode(Opcode, Mode)) return false;
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// If starting offset isn't zero, insert a MI to materialize a new base.
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// But only do so if it is cost effective, i.e. merging more than two
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// loads / stores.
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