Allow vector integer constants to be created with
SelectionDAG::getConstant, in the same way as vector floating-point constants. This allows the legalize expansion code for @llvm.ctpop and friends to be usable with vector types. llvm-svn: 44954
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@ -687,22 +687,35 @@ SDOperand SelectionDAG::getString(const std::string &Val) {
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SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT, bool isT) {
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SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT, bool isT) {
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assert(MVT::isInteger(VT) && "Cannot create FP integer constant!");
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assert(MVT::isInteger(VT) && "Cannot create FP integer constant!");
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assert(!MVT::isVector(VT) && "Cannot create Vector ConstantSDNodes!");
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MVT::ValueType EltVT =
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MVT::isVector(VT) ? MVT::getVectorElementType(VT) : VT;
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// Mask out any bits that are not valid for this constant.
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// Mask out any bits that are not valid for this constant.
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Val &= MVT::getIntVTBitMask(VT);
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Val &= MVT::getIntVTBitMask(EltVT);
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unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
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unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
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FoldingSetNodeID ID;
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FoldingSetNodeID ID;
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AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
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AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
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ID.AddInteger(Val);
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ID.AddInteger(Val);
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void *IP = 0;
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void *IP = 0;
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if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
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SDNode *N = NULL;
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return SDOperand(E, 0);
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if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
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SDNode *N = new ConstantSDNode(isT, Val, VT);
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if (!MVT::isVector(VT))
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return SDOperand(N, 0);
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if (!N) {
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N = new ConstantSDNode(isT, Val, EltVT);
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CSEMap.InsertNode(N, IP);
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CSEMap.InsertNode(N, IP);
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AllNodes.push_back(N);
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AllNodes.push_back(N);
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return SDOperand(N, 0);
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}
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SDOperand Result(N, 0);
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if (MVT::isVector(VT)) {
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SmallVector<SDOperand, 8> Ops;
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Ops.assign(MVT::getVectorNumElements(VT), Result);
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Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
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}
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return Result;
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}
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}
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SDOperand SelectionDAG::getConstantFP(const APFloat& V, MVT::ValueType VT,
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SDOperand SelectionDAG::getConstantFP(const APFloat& V, MVT::ValueType VT,
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@ -483,6 +483,12 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
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setOperationAction(ISD::CTPOP, (MVT::ValueType)VT, Expand);
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setOperationAction(ISD::CTPOP, (MVT::ValueType)VT, Expand);
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setOperationAction(ISD::CTTZ, (MVT::ValueType)VT, Expand);
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setOperationAction(ISD::CTTZ, (MVT::ValueType)VT, Expand);
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setOperationAction(ISD::CTLZ, (MVT::ValueType)VT, Expand);
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setOperationAction(ISD::CTLZ, (MVT::ValueType)VT, Expand);
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setOperationAction(ISD::SHL, (MVT::ValueType)VT, Expand);
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setOperationAction(ISD::SRA, (MVT::ValueType)VT, Expand);
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setOperationAction(ISD::SRL, (MVT::ValueType)VT, Expand);
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setOperationAction(ISD::ROTL, (MVT::ValueType)VT, Expand);
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setOperationAction(ISD::ROTR, (MVT::ValueType)VT, Expand);
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setOperationAction(ISD::BSWAP, (MVT::ValueType)VT, Expand);
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}
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}
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if (Subtarget->hasMMX()) {
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if (Subtarget->hasMMX()) {
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@ -0,0 +1,18 @@
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; RUN: llvm-as < %s | llc -march=x86-64
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declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>)
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declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>)
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declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>)
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define <2 x i64> @footz(<2 x i64> %a) {
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%c = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %a)
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ret <2 x i64> %c
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}
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define <2 x i64> @foolz(<2 x i64> %a) {
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%c = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a)
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ret <2 x i64> %c
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}
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define <2 x i64> @foopop(<2 x i64> %a) {
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%c = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %a)
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ret <2 x i64> %c
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}
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