[InstCombine] narrow lshr with constant
Name: narrow_shift Pre: C1 < 8 %zx = zext i8 %x to i32 %l = lshr i32 %zx, C1 => %narrowC = trunc i32 C1 to i8 %ns = lshr i8 %x, %narrowC %l = zext i8 %ns to i32 http://rise4fun.com/Alive/jIV This isn't directly applicable to PR34046 as written, but we need to have more narrowing folds like this to be sure that rotate patterns are recognized. llvm-svn: 310060
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@ -680,6 +680,15 @@ Instruction *InstCombiner::visitLShr(BinaryOperator &I) {
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return BinaryOperator::CreateAnd(X, ConstantInt::get(Ty, Mask));
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}
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if (match(Op0, m_OneUse(m_ZExt(m_Value(X)))) &&
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(!Ty->isIntegerTy() || shouldChangeType(Ty, X->getType()))) {
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unsigned SrcTyBitWidth = X->getType()->getScalarSizeInBits();
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assert(ShAmt < SrcTyBitWidth && "Big shift not simplified to zero?");
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// lshr (zext iM X to iN), C --> zext (lshr X, C) to iN
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Value *NewLShr = Builder.CreateLShr(X, ShAmt);
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return new ZExtInst(NewLShr, Ty);
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}
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if (match(Op0, m_SExt(m_Value(X))) &&
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(!Ty->isIntegerTy() || shouldChangeType(Ty, X->getType()))) {
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// Are we moving the sign bit to the low bit and widening with high zeros?
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@ -761,9 +761,9 @@ define i64 @test59(i8 %A, i8 %B) nounwind {
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; CHECK-NEXT: [[C:%.*]] = zext i8 %A to i64
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; CHECK-NEXT: [[D:%.*]] = shl nuw nsw i64 [[C]], 4
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; CHECK-NEXT: [[E:%.*]] = and i64 [[D]], 48
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; CHECK-NEXT: [[F:%.*]] = zext i8 %B to i64
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; CHECK-NEXT: [[G:%.*]] = lshr i64 [[F]], 4
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; CHECK-NEXT: [[H:%.*]] = or i64 [[G]], [[E]]
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; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 %B, 4
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; CHECK-NEXT: [[G:%.*]] = zext i8 [[TMP1]] to i64
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; CHECK-NEXT: [[H:%.*]] = or i64 [[E]], [[G]]
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; CHECK-NEXT: ret i64 [[H]]
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;
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%C = zext i8 %A to i32
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@ -190,3 +190,16 @@ define <2 x i8> @fake_sext_splat(<2 x i3> %x) {
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ret <2 x i8> %sh
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}
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; Use a narrow shift: lshr (zext iM X to iN), C --> zext (lshr X, C) to iN
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define <2 x i32> @narrow_lshr_constant(<2 x i8> %x, <2 x i8> %y) {
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; CHECK-LABEL: @narrow_lshr_constant(
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; CHECK-NEXT: [[TMP1:%.*]] = lshr <2 x i8> %x, <i8 3, i8 3>
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; CHECK-NEXT: [[SH:%.*]] = zext <2 x i8> [[TMP1]] to <2 x i32>
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; CHECK-NEXT: ret <2 x i32> [[SH]]
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;
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%zx = zext <2 x i8> %x to <2 x i32>
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%sh = lshr <2 x i32> %zx, <i32 3, i32 3>
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ret <2 x i32> %sh
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}
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@ -283,10 +283,10 @@ define i32 @test66(i64 %x) {
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define i32 @test67(i16 %x) {
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; CHECK-LABEL: @test67(
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; CHECK-NEXT: [[TMP1:%.*]] = and i16 %x, 4
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; CHECK-NEXT: [[TMP2:%.*]] = zext i16 [[TMP1]] to i32
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; CHECK-NEXT: [[TMP3:%.*]] = lshr exact i32 [[TMP2]], 1
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; CHECK-NEXT: [[TMP4:%.*]] = xor i32 [[TMP3]], 42
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; CHECK-NEXT: [[TMP1:%.*]] = lshr i16 %x, 1
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; CHECK-NEXT: [[TMP2:%.*]] = and i16 [[TMP1]], 2
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; CHECK-NEXT: [[TMP3:%.*]] = xor i16 [[TMP2]], 42
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; CHECK-NEXT: [[TMP4:%.*]] = zext i16 [[TMP3]] to i32
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; CHECK-NEXT: ret i32 [[TMP4]]
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;
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%1 = and i16 %x, 4
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@ -91,9 +91,9 @@ define i32 @test6(i64 %A) {
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define i92 @test7(i64 %A) {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: [[B:%.*]] = zext i64 %A to i92
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; CHECK-NEXT: [[C:%.*]] = lshr i92 [[B]], 32
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; CHECK-NEXT: ret i92 [[C]]
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; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 %A, 32
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; CHECK-NEXT: [[D:%.*]] = zext i64 [[TMP1]] to i92
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; CHECK-NEXT: ret i92 [[D]]
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;
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%B = zext i64 %A to i128
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%C = lshr i128 %B, 32
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