Rename FMA3 feature flag to just FMA to match gcc so it can be added to clang.
llvm-svn: 157903
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@ -89,7 +89,7 @@ def FeatureAVX2 : SubtargetFeature<"avx2", "X86SSELevel", "AVX2",
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def FeaturePCLMUL : SubtargetFeature<"pclmul", "HasPCLMUL", "true",
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def FeaturePCLMUL : SubtargetFeature<"pclmul", "HasPCLMUL", "true",
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"Enable packed carry-less multiplication instructions",
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"Enable packed carry-less multiplication instructions",
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[FeatureSSE2]>;
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[FeatureSSE2]>;
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def FeatureFMA3 : SubtargetFeature<"fma3", "HasFMA3", "true",
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def FeatureFMA : SubtargetFeature<"fma", "HasFMA", "true",
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"Enable three-operand fused multiple-add",
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"Enable three-operand fused multiple-add",
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[FeatureAVX]>;
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[FeatureAVX]>;
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def FeatureFMA4 : SubtargetFeature<"fma4", "HasFMA4", "true",
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def FeatureFMA4 : SubtargetFeature<"fma4", "HasFMA4", "true",
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@ -188,7 +188,7 @@ def : Proc<"core-avx2", [FeatureAVX2, FeatureCMPXCHG16B, FeaturePOPCNT,
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FeatureAES, FeaturePCLMUL, FeatureRDRAND,
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FeatureAES, FeaturePCLMUL, FeatureRDRAND,
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FeatureF16C, FeatureFSGSBase,
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FeatureF16C, FeatureFSGSBase,
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FeatureMOVBE, FeatureLZCNT, FeatureBMI,
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FeatureMOVBE, FeatureLZCNT, FeatureBMI,
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FeatureBMI2, FeatureFMA3]>;
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FeatureBMI2, FeatureFMA]>;
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def : Proc<"k6", [FeatureMMX]>;
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def : Proc<"k6", [FeatureMMX]>;
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def : Proc<"k6-2", [Feature3DNow]>;
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def : Proc<"k6-2", [Feature3DNow]>;
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@ -526,7 +526,7 @@ class AVXPCLMULIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
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class FMA3<bits<8> o, Format F, dag outs, dag ins, string asm,
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class FMA3<bits<8> o, Format F, dag outs, dag ins, string asm,
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list<dag>pattern, InstrItinClass itin = IIC_DEFAULT>
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list<dag>pattern, InstrItinClass itin = IIC_DEFAULT>
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: I<o, F, outs, ins, asm, pattern, itin>, T8,
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: I<o, F, outs, ins, asm, pattern, itin>, T8,
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OpSize, VEX_4V, Requires<[HasFMA3]>;
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OpSize, VEX_4V, Requires<[HasFMA]>;
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// FMA4 Instruction Templates
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// FMA4 Instruction Templates
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class FMA4<bits<8> o, Format F, dag outs, dag ins, string asm,
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class FMA4<bits<8> o, Format F, dag outs, dag ins, string asm,
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@ -531,7 +531,7 @@ def HasAVX2 : Predicate<"Subtarget->hasAVX2()">;
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def HasPOPCNT : Predicate<"Subtarget->hasPOPCNT()">;
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def HasPOPCNT : Predicate<"Subtarget->hasPOPCNT()">;
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def HasAES : Predicate<"Subtarget->hasAES()">;
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def HasAES : Predicate<"Subtarget->hasAES()">;
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def HasPCLMUL : Predicate<"Subtarget->hasPCLMUL()">;
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def HasPCLMUL : Predicate<"Subtarget->hasPCLMUL()">;
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def HasFMA3 : Predicate<"Subtarget->hasFMA3()">;
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def HasFMA : Predicate<"Subtarget->hasFMA()">;
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def HasFMA4 : Predicate<"Subtarget->hasFMA4()">;
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def HasFMA4 : Predicate<"Subtarget->hasFMA4()">;
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def HasXOP : Predicate<"Subtarget->hasXOP()">;
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def HasXOP : Predicate<"Subtarget->hasXOP()">;
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def HasMOVBE : Predicate<"Subtarget->hasMOVBE()">;
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def HasMOVBE : Predicate<"Subtarget->hasMOVBE()">;
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@ -206,8 +206,8 @@ void X86Subtarget::AutoDetectSubtargetFeatures() {
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ToggleFeature(X86::FeaturePCLMUL);
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ToggleFeature(X86::FeaturePCLMUL);
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}
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}
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if ((ECX >> 12) & 0x1) {
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if ((ECX >> 12) & 0x1) {
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HasFMA3 = true;
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HasFMA = true;
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ToggleFeature(X86::FeatureFMA3);
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ToggleFeature(X86::FeatureFMA);
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}
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}
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if (IsIntel && ((ECX >> 22) & 0x1)) {
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if (IsIntel && ((ECX >> 22) & 0x1)) {
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HasMOVBE = true;
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HasMOVBE = true;
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@ -327,7 +327,7 @@ X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
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, HasSSE4A(false)
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, HasSSE4A(false)
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, HasAES(false)
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, HasAES(false)
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, HasPCLMUL(false)
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, HasPCLMUL(false)
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, HasFMA3(false)
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, HasFMA(false)
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, HasFMA4(false)
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, HasFMA4(false)
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, HasXOP(false)
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, HasXOP(false)
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, HasMOVBE(false)
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, HasMOVBE(false)
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@ -88,8 +88,8 @@ protected:
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/// HasPCLMUL - Target has carry-less multiplication
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/// HasPCLMUL - Target has carry-less multiplication
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bool HasPCLMUL;
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bool HasPCLMUL;
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/// HasFMA3 - Target has 3-operand fused multiply-add
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/// HasFMA - Target has 3-operand fused multiply-add
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bool HasFMA3;
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bool HasFMA;
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/// HasFMA4 - Target has 4-operand fused multiply-add
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/// HasFMA4 - Target has 4-operand fused multiply-add
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bool HasFMA4;
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bool HasFMA4;
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@ -204,7 +204,7 @@ public:
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bool hasPOPCNT() const { return HasPOPCNT; }
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bool hasPOPCNT() const { return HasPOPCNT; }
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bool hasAES() const { return HasAES; }
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bool hasAES() const { return HasAES; }
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bool hasPCLMUL() const { return HasPCLMUL; }
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bool hasPCLMUL() const { return HasPCLMUL; }
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bool hasFMA3() const { return HasFMA3; }
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bool hasFMA() const { return HasFMA; }
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bool hasFMA4() const { return HasFMA4; }
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bool hasFMA4() const { return HasFMA4; }
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bool hasXOP() const { return HasXOP; }
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bool hasXOP() const { return HasXOP; }
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bool hasMOVBE() const { return HasMOVBE; }
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bool hasMOVBE() const { return HasMOVBE; }
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@ -1,4 +1,4 @@
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; RUN: llc < %s -mtriple=x86_64-pc-win32 -mcpu=core-avx2 -mattr=avx2,+fma3 | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-pc-win32 -mcpu=core-avx2 -mattr=avx2,+fma | FileCheck %s
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define <4 x float> @test_x86_fmadd_ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {
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define <4 x float> @test_x86_fmadd_ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {
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; CHECK: fmadd132ss %xmm
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; CHECK: fmadd132ss %xmm
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