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[ARM] GlobalISel: Support G_ICMP for s8 and s16 

Widen to s32 (like all other binary ops).

llvm-svn: 305683
This commit is contained in:
Diana Picus 2017-06-19 11:47:28 +00:00
parent 6478d14a0d
commit 78aaf7db04
3 changed files with 76 additions and 3 deletions
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2
llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
View File

@ -87,6 +87,8 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) {
setAction({G_CONSTANT, s32}, Legal);
setAction({G_ICMP, s1}, Legal);
for (auto Ty : {s8, s16})
setAction({G_ICMP, 1, Ty}, WidenScalar);
for (auto Ty : {s32, p0})
setAction({G_ICMP, 1, Ty}, Legal);

15
llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll
View File

@ -385,3 +385,18 @@ entry:
%r = zext i1 %v to i32
ret i32 %r
}
define arm_aapcscc i32 @test_cmp_i16_slt(i16 %a, i16 %b) {
; CHECK-LABEL: test_cmp_i16_slt:
; CHECK-DAG: sxth r0, r0
; CHECK-DAG: sxth r1, r1
; CHECK-DAG: mov [[V:r[0-9]+]], #0
; CHECK: cmp r0, r1
; CHECK: movlt [[V]], #1
; CHECK: and r0, [[V]], #1
; CHECK: bx lr
entry:
%v = icmp slt i16 %a, %b
%r = zext i1 %v to i32
ret i32 %r
}

62
llvm/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir
View File

@ -35,7 +35,9 @@
define void @test_constants() { ret void }
define void @test_icmp_eq_s32() { ret void }
define void @test_icmp_s8() { ret void }
define void @test_icmp_s16() { ret void }
define void @test_icmp_s32() { ret void }
define void @test_fadd_s32() #0 { ret void }
define void @test_fadd_s64() #0 { ret void }
@ -693,8 +695,62 @@ body: |
BX_RET 14, _, implicit %r0
...
---
name: test_icmp_eq_s32
# CHECK-LABEL: name: test_icmp_eq_s32
name: test_icmp_s8
# CHECK-LABEL: name: test_icmp_s8
legalized: false
# CHECK: legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s8) = COPY %r0
%1(s8) = COPY %r1
%2(s1) = G_ICMP intpred(ne), %0(s8), %1
; G_ICMP with s8 should widen
; CHECK: {{%[0-9]+}}(s1) = G_ICMP intpred(ne), {{%[0-9]+}}(s32), {{%[0-9]+}}
; CHECK-NOT: {{%[0-9]+}}(s1) = G_ICMP intpred(ne), {{%[0-9]+}}(s8), {{%[0-9]+}}
%3(s32) = G_ZEXT %2(s1)
%r0 = COPY %3(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_icmp_s16
# CHECK-LABEL: name: test_icmp_s16
legalized: false
# CHECK: legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s16) = COPY %r0
%1(s16) = COPY %r1
%2(s1) = G_ICMP intpred(slt), %0(s16), %1
; G_ICMP with s16 should widen
; CHECK: {{%[0-9]+}}(s1) = G_ICMP intpred(slt), {{%[0-9]+}}(s32), {{%[0-9]+}}
; CHECK-NOT: {{%[0-9]+}}(s1) = G_ICMP intpred(slt), {{%[0-9]+}}(s16), {{%[0-9]+}}
%3(s32) = G_ZEXT %2(s1)
%r0 = COPY %3(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_icmp_s32
# CHECK-LABEL: name: test_icmp_s32
legalized: false
# CHECK: legalized: true
regBankSelected: false