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Fix for PR1306. 

- A register def / use now implicitly affects sub-register liveness but does
not affect liveness information of super-registers.
- Def of a larger register (if followed by a use later) is treated as
read/mod/write of a smaller register.

llvm-svn: 36434
This commit is contained in:
Evan Cheng 2007-04-25 07:30:23 +00:00
parent 93e3a2e6f7
commit 7818c03c6b
4 changed files with 199 additions and 49 deletions
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2
llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h
View File

@ -255,7 +255,7 @@ namespace llvm {
/// handleLiveInRegister - Create interval for a livein register.
void handleLiveInRegister(MachineBasicBlock* mbb,
unsigned MIIdx,
LiveInterval &interval);
LiveInterval &interval, bool isAlias = false);
/// Return true if the two specified registers belong to different
/// register classes. The registers may be either phys or virt regs.

21
llvm/include/llvm/CodeGen/LiveVariables.h
View File

@ -124,8 +124,25 @@ private: // Intermediate data structures
const MRegisterInfo *RegInfo;
MachineInstr **PhysRegInfo;
bool *PhysRegUsed;
// PhysRegInfo - Keep track of which instruction was the last def/use of a
// physical register. This is a purely local property, because all physical
// register references as presumed dead across basic blocks.
std::vector<MachineInstr*> PhysRegInfo;
// PhysRegUsed - Keep track whether the physical register has been used after
// its last definition. This is local property.
BitVector PhysRegUsed;
// PhysRegPartDef - Keep track of a list of instructions which "partially"
// defined the physical register (e.g. on X86 AX partially defines EAX).
// These are turned into use/mod/write if there is a use of the register
// later in the same block. This is local property.
std::vector<std::vector<MachineInstr*> > PhysRegPartDef;
// PhysRegPartUse - Keep track of which instruction was the last partial use
// of a physical register (e.g. on X86 a def of EAX followed by a use of AX).
// This is a purely local property.
std::vector<MachineInstr*> PhysRegPartUse;
typedef std::map<const MachineBasicBlock*,
std::vector<unsigned> > PHIVarInfoMap;

58
llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
View File

@ -675,8 +675,12 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
exit:
assert(start < end && "did not find end of interval?");
LiveRange LR(start, end, interval.getNextValue(SrcReg != 0 ? start : ~0U,
SrcReg));
// Already exists? Extend old live interval.
LiveInterval::iterator OldLR = interval.FindLiveRangeContaining(start);
unsigned Id = (OldLR != interval.end())
? OldLR->ValId
: interval.getNextValue(SrcReg != 0 ? start : ~0U, SrcReg);
LiveRange LR(start, end, Id);
interval.addRange(LR);
DOUT << " +" << LR << '\n';
}
@ -692,14 +696,17 @@ void LiveIntervals::handleRegisterDef(MachineBasicBlock *MBB,
if (!tii_->isMoveInstr(*MI, SrcReg, DstReg))
SrcReg = 0;
handlePhysicalRegisterDef(MBB, MI, MIIdx, getOrCreateInterval(reg), SrcReg);
for (const unsigned* AS = mri_->getAliasSet(reg); *AS; ++AS)
handlePhysicalRegisterDef(MBB, MI, MIIdx, getOrCreateInterval(*AS), 0);
// Def of a register also defines its sub-registers.
for (const unsigned* AS = mri_->getSubRegisters(reg); *AS; ++AS)
// Avoid processing some defs more than once.
if (!MI->findRegisterDefOperand(*AS))
handlePhysicalRegisterDef(MBB, MI, MIIdx, getOrCreateInterval(*AS), 0);
}
}
void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
unsigned MIIdx,
LiveInterval &interval) {
LiveInterval &interval, bool isAlias) {
DOUT << "\t\tlivein register: "; DEBUG(printRegName(interval.reg));
// Look for kills, if it reaches a def before it's killed, then it shouldn't
@ -728,6 +735,12 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
}
exit:
// Alias of a live-in register might not be used at all.
if (isAlias && end == 0) {
DOUT << " dead";
end = getDefIndex(start) + 1;
}
assert(start < end && "did not find end of interval?");
LiveRange LR(start, end, interval.getNextValue(~0U, 0));
@ -757,8 +770,10 @@ void LiveIntervals::computeIntervals() {
for (MachineBasicBlock::const_livein_iterator LI = MBB->livein_begin(),
LE = MBB->livein_end(); LI != LE; ++LI) {
handleLiveInRegister(MBB, MIIndex, getOrCreateInterval(*LI));
for (const unsigned* AS = mri_->getAliasSet(*LI); *AS; ++AS)
handleLiveInRegister(MBB, MIIndex, getOrCreateInterval(*AS));
// Multiple live-ins can alias the same register.
for (const unsigned* AS = mri_->getSubRegisters(*LI); *AS; ++AS)
if (!hasInterval(*AS))
handleLiveInRegister(MBB, MIIndex, getOrCreateInterval(*AS), true);
}
}
@ -856,7 +871,8 @@ bool LiveIntervals::AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB,
// If the IntB live range is assigned to a physical register, and if that
// physreg has aliases,
if (MRegisterInfo::isPhysicalRegister(IntB.reg)) {
for (const unsigned *AS = mri_->getAliasSet(IntB.reg); *AS; ++AS) {
// Update the liveintervals of sub-registers.
for (const unsigned *AS = mri_->getSubRegisters(IntB.reg); *AS; ++AS) {
LiveInterval &AliasLI = getInterval(*AS);
AliasLI.addRange(LiveRange(FillerStart, FillerEnd,
AliasLI.getNextValue(~0U, 0)));
@ -1055,8 +1071,9 @@ bool LiveIntervals::JoinCopy(MachineInstr *CopyMI,
// we have to update any aliased register's live ranges to indicate that they
// have clobbered values for this range.
if (MRegisterInfo::isPhysicalRegister(repDstReg)) {
for (const unsigned *AS = mri_->getAliasSet(repDstReg); *AS; ++AS)
getInterval(*AS).MergeInClobberRanges(SrcInt);
// Update the liveintervals of sub-registers.
for (const unsigned *AS = mri_->getSubRegisters(repDstReg); *AS; ++AS)
getInterval(*AS).MergeInClobberRanges(SrcInt);
} else {
// Merge use info if the destination is a virtual register.
LiveVariables::VarInfo& dVI = lv_->getVarInfo(repDstReg);
@ -1279,6 +1296,27 @@ bool LiveIntervals::JoinIntervals(LiveInterval &LHS, LiveInterval &RHS) {
SmallVector<int, 16> LHSValNoAssignments;
SmallVector<int, 16> RHSValNoAssignments;
SmallVector<std::pair<unsigned,unsigned>, 16> ValueNumberInfo;
// If a live interval is a physical register, conservatively check if any
// of its sub-registers is overlapping the live interval of the virtual
// register. If so, do not coalesce.
if (MRegisterInfo::isPhysicalRegister(LHS.reg) &&
*mri_->getSubRegisters(LHS.reg)) {
for (const unsigned* SR = mri_->getSubRegisters(LHS.reg); *SR; ++SR)
if (hasInterval(*SR) && RHS.overlaps(getInterval(*SR))) {
DOUT << "Interfere with sub-register ";
DEBUG(getInterval(*SR).print(DOUT, mri_));
return false;
}
} else if (MRegisterInfo::isPhysicalRegister(RHS.reg) &&
*mri_->getSubRegisters(RHS.reg)) {
for (const unsigned* SR = mri_->getSubRegisters(RHS.reg); *SR; ++SR)
if (hasInterval(*SR) && LHS.overlaps(getInterval(*SR))) {
DOUT << "Interfere with sub-register ";
DEBUG(getInterval(*SR).print(DOUT, mri_));
return false;
}
}
// Compute ultimate value numbers for the LHS and RHS values.
if (RHS.containsOneValue()) {

167
llvm/lib/CodeGen/LiveVariables.cpp
View File

@ -77,7 +77,10 @@ bool LiveVariables::KillsRegister(MachineInstr *MI, unsigned Reg) const {
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (MO.isReg() && MO.isKill()) {
if (RegInfo->regsOverlap(Reg, MO.getReg()))
if ((MO.getReg() == Reg) ||
(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
MRegisterInfo::isPhysicalRegister(Reg) &&
RegInfo->isSubRegister(MO.getReg(), Reg)))
return true;
}
}
@ -87,9 +90,13 @@ bool LiveVariables::KillsRegister(MachineInstr *MI, unsigned Reg) const {
bool LiveVariables::RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const {
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (MO.isReg() && MO.isDead())
if (RegInfo->regsOverlap(Reg, MO.getReg()))
if (MO.isReg() && MO.isDead()) {
if ((MO.getReg() == Reg) ||
(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
MRegisterInfo::isPhysicalRegister(Reg) &&
RegInfo->isSubRegister(MO.getReg(), Reg)))
return true;
}
}
return false;
}
@ -97,10 +104,8 @@ bool LiveVariables::RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const {
bool LiveVariables::ModifiesRegister(MachineInstr *MI, unsigned Reg) const {
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (MO.isReg() && MO.isDef()) {
if (RegInfo->regsOverlap(Reg, MO.getReg()))
return true;
}
if (MO.isReg() && MO.isDef() && MO.getReg() == Reg)
return true;
}
return false;
}
@ -166,57 +171,145 @@ void LiveVariables::HandleVirtRegUse(VarInfo &VRInfo, MachineBasicBlock *MBB,
}
void LiveVariables::addRegisterKilled(unsigned IncomingReg, MachineInstr *MI) {
bool Found = false;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (MO.isReg() && MO.isUse() && MO.getReg() == IncomingReg) {
MO.setIsKill();
break;
if (MO.isReg() && MO.isUse()) {
unsigned Reg = MO.getReg();
if (!Reg)
continue;
if (Reg == IncomingReg) {
MO.setIsKill();
Found = true;
break;
} else if (MRegisterInfo::isPhysicalRegister(Reg) &&
MRegisterInfo::isPhysicalRegister(IncomingReg) &&
RegInfo->isSuperRegister(IncomingReg, Reg) &&
MO.isKill())
// A super-register kill already exists.
return;
}
}
// If not found, this means an alias of one of the operand is killed. Add a
// new implicit operand.
if (!Found)
MI->addRegOperand(IncomingReg, false/*IsDef*/,true/*IsImp*/,true/*IsKill*/);
}
void LiveVariables::addRegisterDead(unsigned IncomingReg, MachineInstr *MI) {
bool Found = false;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (MO.isReg() && MO.isDef() && MO.getReg() == IncomingReg) {
MO.setIsDead();
break;
if (MO.isReg() && MO.isDef()) {
unsigned Reg = MO.getReg();
if (!Reg)
continue;
if (Reg == IncomingReg) {
MO.setIsDead();
Found = true;
break;
} else if (MRegisterInfo::isPhysicalRegister(Reg) &&
MRegisterInfo::isPhysicalRegister(IncomingReg) &&
RegInfo->isSuperRegister(IncomingReg, Reg) &&
MO.isDead())
// There exists a super-register that's marked dead.
return;
}
}
// If not found, this means an alias of one of the operand is dead. Add a
// new implicit operand.
if (!Found)
MI->addRegOperand(IncomingReg, true/*IsDef*/,true/*IsImp*/,false/*IsKill*/,
true/*IsDead*/);
}
void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr *MI) {
// There is a now a proper use, forget about the last partial use.
PhysRegPartUse[Reg] = NULL;
// Turn previous partial def's into read/mod/write.
for (unsigned i = 0, e = PhysRegPartDef[Reg].size(); i != e; ++i) {
MachineInstr *Def = PhysRegPartDef[Reg][i];
// First one is just a def. This means the use is reading some undef bits.
if (i != 0)
Def->addRegOperand(Reg, false/*IsDef*/,true/*IsImp*/,true/*IsKill*/);
Def->addRegOperand(Reg, true/*IsDef*/,true/*IsImp*/);
}
PhysRegPartDef[Reg].clear();
// There was an earlier def of a super-register. Add implicit def to that MI.
// A: EAX = ...
// B: = AX
// Add implicit def to A.
if (PhysRegInfo[Reg] && !PhysRegUsed[Reg]) {
MachineInstr *Def = PhysRegInfo[Reg];
if (!Def->findRegisterDefOperand(Reg))
Def->addRegOperand(Reg, true/*IsDef*/,true/*IsImp*/);
}
PhysRegInfo[Reg] = MI;
PhysRegUsed[Reg] = true;
for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
unsigned Alias = *AliasSet; ++AliasSet) {
PhysRegInfo[Alias] = MI;
PhysRegUsed[Alias] = true;
for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg);
unsigned SubReg = *SubRegs; ++SubRegs) {
PhysRegInfo[SubReg] = MI;
PhysRegUsed[SubReg] = true;
}
// Remember the partial uses.
for (const unsigned *SuperRegs = RegInfo->getSuperRegisters(Reg);
unsigned SuperReg = *SuperRegs; ++SuperRegs)
PhysRegPartUse[SuperReg] = MI;
}
void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI) {
// Does this kill a previous version of this register?
if (MachineInstr *LastUse = PhysRegInfo[Reg]) {
if (MachineInstr *LastRef = PhysRegInfo[Reg]) {
if (PhysRegUsed[Reg])
addRegisterKilled(Reg, LastUse);
addRegisterKilled(Reg, LastRef);
else if (PhysRegPartUse[Reg])
// Add implicit use / kill to last use of a sub-register.
addRegisterKilled(Reg, PhysRegPartUse[Reg]);
else
addRegisterDead(Reg, LastUse);
addRegisterDead(Reg, LastRef);
}
PhysRegInfo[Reg] = MI;
PhysRegUsed[Reg] = false;
PhysRegPartUse[Reg] = NULL;
for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
unsigned Alias = *AliasSet; ++AliasSet) {
if (MachineInstr *LastUse = PhysRegInfo[Alias]) {
if (PhysRegUsed[Alias])
addRegisterKilled(Alias, LastUse);
for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg);
unsigned SubReg = *SubRegs; ++SubRegs) {
if (MachineInstr *LastRef = PhysRegInfo[SubReg]) {
if (PhysRegUsed[SubReg])
addRegisterKilled(SubReg, LastRef);
else if (PhysRegPartUse[SubReg])
// Add implicit use / kill to last use of a sub-register.
addRegisterKilled(SubReg, PhysRegPartUse[SubReg]);
else
addRegisterDead(Alias, LastUse);
addRegisterDead(SubReg, LastRef);
}
PhysRegInfo[Alias] = MI;
PhysRegUsed[Alias] = false;
PhysRegInfo[SubReg] = MI;
PhysRegUsed[SubReg] = false;
}
if (MI)
for (const unsigned *SuperRegs = RegInfo->getSuperRegisters(Reg);
unsigned SuperReg = *SuperRegs; ++SuperRegs) {
if (PhysRegInfo[SuperReg]) {
// The larger register is previously defined. Now a smaller part is
// being re-defined. Treat it as read/mod/write.
// EAX =
// AX = EAX<imp-use,kill>, EAX<imp-def>
MI->addRegOperand(SuperReg, false/*IsDef*/,true/*IsImp*/,true/*IsKill*/);
MI->addRegOperand(SuperReg, true/*IsDef*/,true/*IsImp*/);
PhysRegInfo[SuperReg] = MI;
PhysRegUsed[SuperReg] = false;
} else {
// Remember this partial def.
PhysRegPartDef[SuperReg].push_back(MI);
}
}
}
@ -228,14 +321,10 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) {
ReservedRegisters = RegInfo->getReservedRegs(mf);
// PhysRegInfo - Keep track of which instruction was the last use of a
// physical register. This is a purely local property, because all physical
// register references as presumed dead across basic blocks.
//
PhysRegInfo = (MachineInstr**)alloca(sizeof(MachineInstr*) *
RegInfo->getNumRegs());
PhysRegUsed = (bool*)alloca(sizeof(bool)*RegInfo->getNumRegs());
std::fill(PhysRegInfo, PhysRegInfo+RegInfo->getNumRegs(), (MachineInstr*)0);
PhysRegInfo.resize(RegInfo->getNumRegs(), (MachineInstr*)NULL);
PhysRegUsed.resize(RegInfo->getNumRegs());
PhysRegPartDef.resize(RegInfo->getNumRegs());
PhysRegPartUse.resize(RegInfo->getNumRegs(), (MachineInstr*)NULL);
/// Get some space for a respectable number of registers...
VirtRegInfo.resize(64);
@ -342,6 +431,12 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) {
for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
if (PhysRegInfo[i])
HandlePhysRegDef(i, 0);
// Clear some states between BB's. These are purely local information.
for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i) {
PhysRegPartDef[i].clear();
PhysRegPartUse[i] = NULL;
}
}
// Convert and transfer the dead / killed information we have gathered into