Fix my brain cramp by inverting the assertion condition.
llvm-svn: 76131
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@ -491,12 +491,10 @@ static void ReMaterialize(MachineBasicBlock &MBB,
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const TargetRegisterInfo *TRI,
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VirtRegMap &VRM) {
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MachineInstr *ReMatDefMI = VRM.getReMaterializedMI(Reg);
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#if 0
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#ifndef NDEBUG
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const TargetInstrDesc &TID = ReMatDefMI->getDesc();
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assert(TID.getNumDefs() != 1 &&
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assert(TID.getNumDefs() == 1 &&
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"Don't know how to remat instructions that define > 1 values!");
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#endif
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#endif
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TII->reMaterialize(MBB, MII, DestReg,
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ReMatDefMI->getOperand(0).getSubReg(), ReMatDefMI);
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