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Fix verification of explicit operands. 

The machine code verifier did not check for explicit operands correctly. It
used MachineInstr::getNumExplicitOperands, but that method may cheat and use
the declared count in the TargetInstrDesc.

Now we check the explicit operands one at a time in visitMachineOperand.

llvm-svn: 82652
This commit is contained in:
Jakob Stoklund Olesen 2009-09-23 20:57:55 +00:00
parent abfdbbfd1a
commit 75b9c2741d
1 changed files with 11 additions and 8 deletions
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19
llvm/lib/CodeGen/MachineVerifier.cpp
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@ -466,18 +466,11 @@ void
MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI)
{
const TargetInstrDesc &TI = MI->getDesc();
if (MI->getNumExplicitOperands() < TI.getNumOperands()) {
if (MI->getNumOperands() < TI.getNumOperands()) {
report("Too few operands", MI);
*OS << TI.getNumOperands() << " operands expected, but "
<< MI->getNumExplicitOperands() << " given.\n";
}
if (!TI.isVariadic()) {
if (MI->getNumExplicitOperands() > TI.getNumOperands()) {
report("Too many operands", MI);
*OS << TI.getNumOperands() << " operands expected, but "
<< MI->getNumExplicitOperands() << " given.\n";
}
}
}
void
@ -494,6 +487,16 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum)
report("Explicit definition marked as use", MO, MONum);
else if (MO->isImplicit())
report("Explicit definition marked as implicit", MO, MONum);
} else if (MONum < TI.getNumOperands()) {
if (MO->isReg()) {
if (MO->isDef())
report("Explicit operand marked as def", MO, MONum);
if (MO->isImplicit())
report("Explicit operand marked as implicit", MO, MONum);
}
} else {
if (MO->isReg() && !MO->isImplicit() && !TI.isVariadic())
report("Extra explicit operand on non-variadic instruction", MO, MONum);
}
switch (MO->getType()) {