[NVPTX] Implement isLegalToVectorizeLoadChain
This lets LSV nicely split up underaligned chains. Differential Revision: https://reviews.llvm.org/D51306 llvm-svn: 340760
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@ -49,6 +49,19 @@ public:
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return AddressSpace::ADDRESS_SPACE_GENERIC;
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}
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// Loads and stores can be vectorized if the alignment is at least as big as
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// the load/store we want to vectorize.
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bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes,
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unsigned Alignment,
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unsigned AddrSpace) const {
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return Alignment >= ChainSizeInBytes;
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}
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bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes,
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unsigned Alignment,
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unsigned AddrSpace) const {
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return isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment, AddrSpace);
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}
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// NVPTX has infinite registers of all kinds, but the actual machine doesn't.
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// We conservatively return 1 here which is just enough to enable the
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// vectorizers but disables heuristics based on the number of registers.
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@ -0,0 +1,29 @@
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; RUN: llc < %s | FileCheck %s
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target triple = "nvptx64-nvidia-cuda"
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; CHECK-LABEL: test1
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; CHECK: ld.global.v2.f32
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; CHECK: ld.global.v2.f32
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; CHECK: st.global.v2.f32
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; CHECK: st.global.v2.f32
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define void @test1(float addrspace(1)* noalias align 8 %in, float addrspace(1)* noalias align 8 %out) {
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%in.1 = getelementptr float, float addrspace(1)* %in, i32 1
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%in.2 = getelementptr float, float addrspace(1)* %in, i32 2
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%in.3 = getelementptr float, float addrspace(1)* %in, i32 3
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%v0 = load float, float addrspace(1)* %in, align 8
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%v1 = load float, float addrspace(1)* %in.1, align 4
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%v2 = load float, float addrspace(1)* %in.2, align 8
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%v3 = load float, float addrspace(1)* %in.3, align 4
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%sum0 = fadd float %v0, %v1
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%sum1 = fadd float %v1, %v2
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%sum2 = fadd float %v3, %v1
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%sum3 = fadd float %v2, %v3
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%out.1 = getelementptr float, float addrspace(1)* %out, i32 1
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%out.2 = getelementptr float, float addrspace(1)* %out, i32 2
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%out.3 = getelementptr float, float addrspace(1)* %out, i32 3
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store float %sum0, float addrspace(1)* %out, align 8
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store float %sum1, float addrspace(1)* %out.1, align 4
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store float %sum2, float addrspace(1)* %out.2, align 8
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store float %sum3, float addrspace(1)* %out.3, align 4
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ret void
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}
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