ARM NEON "vmov.i8" immediate assembly parsing and encoding.
NEON immediates are "interesting". Start of the work to handle parsing them in an 'as' compatible manner. Getting the matcher to play nicely with these and the floating point immediates from VFP is an extra fun wrinkle. llvm-svn: 142293
This commit is contained in:
Jim Grosbach
parent
cb6e5c16ef
commit
741cd73aab
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@ -19,6 +19,12 @@ def nModImm : Operand<i32> {
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let PrintMethod = "printNEONModImmOperand";
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}
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def nImmSplatI8AsmOperand : AsmOperandClass { let Name = "NEONi8splat"; }
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def nImmSplatI8 : Operand<i32> {
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let PrintMethod = "printNEONModImmOperand";
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let ParserMatchClass = nImmSplatI8AsmOperand;
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}
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def VectorIndex8Operand : AsmOperandClass { let Name = "VectorIndex8"; }
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def VectorIndex16Operand : AsmOperandClass { let Name = "VectorIndex16"; }
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def VectorIndex32Operand : AsmOperandClass { let Name = "VectorIndex32"; }
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@ -4314,11 +4320,11 @@ def : InstAlias<"vmov${p} $Vd, $Vm",
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let isReMaterializable = 1 in {
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def VMOVv8i8 : N1ModImm<1, 0b000, 0b1110, 0, 0, 0, 1, (outs DPR:$Vd),
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(ins nModImm:$SIMM), IIC_VMOVImm,
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(ins nImmSplatI8:$SIMM), IIC_VMOVImm,
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"vmov", "i8", "$Vd, $SIMM", "",
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[(set DPR:$Vd, (v8i8 (NEONvmovImm timm:$SIMM)))]>;
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def VMOVv16i8 : N1ModImm<1, 0b000, 0b1110, 0, 1, 0, 1, (outs QPR:$Vd),
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(ins nModImm:$SIMM), IIC_VMOVImm,
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(ins nImmSplatI8:$SIMM), IIC_VMOVImm,
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"vmov", "i8", "$Vd, $SIMM", "",
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[(set QPR:$Vd, (v16i8 (NEONvmovImm timm:$SIMM)))]>;
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@ -898,6 +898,7 @@ public:
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bool isMSRMask() const { return Kind == k_MSRMask; }
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bool isProcIFlags() const { return Kind == k_ProcIFlags; }
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// NEON operands.
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bool isVectorIndex8() const {
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if (Kind != k_VectorIndex) return false;
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return VectorIndex.Val < 8;
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@ -911,7 +912,18 @@ public:
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return VectorIndex.Val < 2;
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}
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bool isNEONi8splat() const {
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if (Kind != k_Immediate)
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return false;
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
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// Must be a constant.
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if (!CE) return false;
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int64_t Value = CE->getValue();
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// i8 value splatted across 8 bytes. The immediate is just the 8 byte
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// value.
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// return ((Value << 8) | (Value & 0xff)) == Value;
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return Value >= 0 && Value < 256;
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}
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void addExpr(MCInst &Inst, const MCExpr *Expr) const {
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// Add as immediates when possible. Null MCExpr = 0.
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@ -1435,6 +1447,14 @@ public:
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Inst.addOperand(MCOperand::CreateImm(getVectorIndex()));
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}
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void addNEONi8splatOperands(MCInst &Inst, unsigned N) const {
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assert(N == 1 && "Invalid number of operands!");
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// The immediate encodes the type of constant as well as the value.
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// Mask in that this is an i8 splat.
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
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Inst.addOperand(MCOperand::CreateImm(CE->getValue() | 0xe00));
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}
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virtual void print(raw_ostream &OS) const;
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static ARMOperand *CreateITMask(unsigned Mask, SMLoc S) {
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@ -3330,6 +3350,22 @@ parseFPImm(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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if (Parser.getTok().isNot(AsmToken::Hash))
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return MatchOperand_NoMatch;
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// Disambiguate the VMOV forms that can accept an FP immediate.
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// vmov.f32 <sreg>, #imm
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// vmov.f64 <dreg>, #imm
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// vmov.f32 <dreg>, #imm @ vector f32x2
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// vmov.f32 <qreg>, #imm @ vector f32x4
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//
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// There are also the NEON VMOV instructions which expect an
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// integer constant. Make sure we don't try to parse an FPImm
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// for these:
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// vmov.i{8|16|32|64} <dreg|qreg>, #imm
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ARMOperand *TyOp = static_cast<ARMOperand*>(Operands[2]);
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if (!TyOp->isToken() || (TyOp->getToken() != ".f32" &&
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TyOp->getToken() != ".f64"))
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return MatchOperand_NoMatch;
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Parser.Lex(); // Eat the '#'.
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// Handle negation, as that still comes through as a separate token.
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@ -1,69 +1,68 @@
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@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s
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@ XFAIL: *
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vmov.i8 d16, #0x8
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vmov.i16 d16, #0x10
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vmov.i16 d16, #0x1000
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vmov.i32 d16, #0x20
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vmov.i32 d16, #0x2000
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vmov.i32 d16, #0x200000
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vmov.i32 d16, #0x20000000
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vmov.i32 d16, #0x20FF
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vmov.i32 d16, #0x20FFFF
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vmov.i64 d16, #0xFF0000FF0000FFFF
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@ vmov.i16 d16, #0x10
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@ vmov.i16 d16, #0x1000
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@ vmov.i32 d16, #0x20
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@ vmov.i32 d16, #0x2000
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@ vmov.i32 d16, #0x200000
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@ vmov.i32 d16, #0x20000000
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@ vmov.i32 d16, #0x20FF
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@ vmov.i32 d16, #0x20FFFF
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@ vmov.i64 d16, #0xFF0000FF0000FFFF
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@ CHECK: vmov.i8 d16, #0x8 @ encoding: [0x18,0x0e,0xc0,0xf2]
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@ CHECK: vmov.i16 d16, #0x10 @ encoding: [0x10,0x08,0xc1,0xf2]
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@ CHECK: vmov.i16 d16, #0x1000 @ encoding: [0x10,0x0a,0xc1,0xf2]
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@ CHECK: vmov.i32 d16, #0x20 @ encoding: [0x10,0x00,0xc2,0xf2]
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@ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0x10,0x02,0xc2,0xf2]
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@ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0x10,0x04,0xc2,0xf2]
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@ CHECK: vmov.i32 d16, #0x20000000 @ encoding: [0x10,0x06,0xc2,0xf2]
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@ CHECK: vmov.i32 d16, #0x20FF @ encoding: [0x10,0x0c,0xc2,0xf2]
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@ CHECK: vmov.i32 d16, #0x20FFFF @ encoding: [0x10,0x0d,0xc2,0xf2]
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@ CHECK: vmov.i64 d16, #0xFF0000FF0000FFFF @ encoding: [0x33,0x0e,0xc1,0xf3]
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@ FIXME: vmov.i16 d16, #0x10 @ encoding: [0x10,0x08,0xc1,0xf2]
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@ FIXME: vmov.i16 d16, #0x1000 @ encoding: [0x10,0x0a,0xc1,0xf2]
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@ FIXME: vmov.i32 d16, #0x20 @ encoding: [0x10,0x00,0xc2,0xf2]
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@ FIXME: vmov.i32 d16, #0x2000 @ encoding: [0x10,0x02,0xc2,0xf2]
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@ FIXME: vmov.i32 d16, #0x200000 @ encoding: [0x10,0x04,0xc2,0xf2]
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@ FIXME: vmov.i32 d16, #0x20000000 @ encoding: [0x10,0x06,0xc2,0xf2]
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@ FIXME: vmov.i32 d16, #0x20FF @ encoding: [0x10,0x0c,0xc2,0xf2]
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@ FIXME: vmov.i32 d16, #0x20FFFF @ encoding: [0x10,0x0d,0xc2,0xf2]
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@ FIXME: vmov.i64 d16, #0xFF0000FF0000FFFF @ encoding: [0x33,0x0e,0xc1,0xf3]
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vmov.i8 q8, #0x8
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vmov.i16 q8, #0x10
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vmov.i16 q8, #0x1000
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vmov.i32 q8, #0x20
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vmov.i32 q8, #0x2000
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vmov.i32 q8, #0x200000
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vmov.i32 q8, #0x20000000
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vmov.i32 q8, #0x20FF
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vmov.i32 q8, #0x20FFFF
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vmov.i64 q8, #0xFF0000FF0000FFFF
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@ vmov.i16 q8, #0x10
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@ vmov.i16 q8, #0x1000
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@ vmov.i32 q8, #0x20
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@ vmov.i32 q8, #0x2000
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@ vmov.i32 q8, #0x200000
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@ vmov.i32 q8, #0x20000000
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@ vmov.i32 q8, #0x20FF
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@ vmov.i32 q8, #0x20FFFF
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@ vmov.i64 q8, #0xFF0000FF0000FFFF
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@ CHECK: vmov.i8 q8, #0x8 @ encoding: [0x58,0x0e,0xc0,0xf2]
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@ CHECK: vmov.i16 q8, #0x10 @ encoding: [0x50,0x08,0xc1,0xf2]
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@ CHECK: vmov.i16 q8, #0x1000 @ encoding: [0x50,0x0a,0xc1,0xf2]
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@ CHECK: vmov.i32 q8, #0x20 @ encoding: [0x50,0x00,0xc2,0xf2]
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@ CHECK: vmov.i32 q8, #0x2000 @ encoding: [0x50,0x02,0xc2,0xf2]
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@ CHECK: vmov.i32 q8, #0x200000 @ encoding: [0x50,0x04,0xc2,0xf2]
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@ CHECK: vmov.i32 q8, #0x20000000 @ encoding: [0x50,0x06,0xc2,0xf2]
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@ CHECK: vmov.i32 q8, #0x20FF @ encoding: [0x50,0x0c,0xc2,0xf2]
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@ CHECK: vmov.i32 q8, #0x20FFFF @ encoding: [0x50,0x0d,0xc2,0xf2]
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@ CHECK: vmov.i64 q8, #0xFF0000FF0000FFFF @ encoding: [0x73,0x0e,0xc1,0xf3]
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@ FIXME: vmov.i16 q8, #0x10 @ encoding: [0x50,0x08,0xc1,0xf2]
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@ FIXME: vmov.i16 q8, #0x1000 @ encoding: [0x50,0x0a,0xc1,0xf2]
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@ FIXME: vmov.i32 q8, #0x20 @ encoding: [0x50,0x00,0xc2,0xf2]
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@ FIXME: vmov.i32 q8, #0x2000 @ encoding: [0x50,0x02,0xc2,0xf2]
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@ FIXME: vmov.i32 q8, #0x200000 @ encoding: [0x50,0x04,0xc2,0xf2]
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@ FIXME: vmov.i32 q8, #0x20000000 @ encoding: [0x50,0x06,0xc2,0xf2]
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@ FIXME: vmov.i32 q8, #0x20FF @ encoding: [0x50,0x0c,0xc2,0xf2]
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@ FIXME: vmov.i32 q8, #0x20FFFF @ encoding: [0x50,0x0d,0xc2,0xf2]
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@ FIXME: vmov.i64 q8, #0xFF0000FF0000FFFF @ encoding: [0x73,0x0e,0xc1,0xf3]
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vmvn.i16 d16, #0x10
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vmvn.i16 d16, #0x1000
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vmvn.i32 d16, #0x20
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vmvn.i32 d16, #0x2000
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vmvn.i32 d16, #0x200000
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vmvn.i32 d16, #0x20000000
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vmvn.i32 d16, #0x20FF
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vmvn.i32 d16, #0x20FFFF
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@ vmvn.i16 d16, #0x10
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@ vmvn.i16 d16, #0x1000
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@ vmvn.i32 d16, #0x20
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@ vmvn.i32 d16, #0x2000
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@ vmvn.i32 d16, #0x200000
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@ vmvn.i32 d16, #0x20000000
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@ vmvn.i32 d16, #0x20FF
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@ vmvn.i32 d16, #0x20FFFF
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@ CHECK: vmvn.i16 d16, #0x10 @ encoding: [0x30,0x08,0xc1,0xf2]
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@ CHECK: vmvn.i16 d16, #0x1000 @ encoding: [0x30,0x0a,0xc1,0xf2]
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@ CHECK: vmvn.i32 d16, #0x20 @ encoding: [0x30,0x00,0xc2,0xf2]
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@ CHECK: vmvn.i32 d16, #0x2000 @ encoding: [0x30,0x02,0xc2,0xf2]
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@ CHECK: vmvn.i32 d16, #0x200000 @ encoding: [0x30,0x04,0xc2,0xf2]
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@ CHECK: vmvn.i32 d16, #0x20000000 @ encoding: [0x30,0x06,0xc2,0xf2]
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@ CHECK: vmvn.i32 d16, #0x20FF @ encoding: [0x30,0x0c,0xc2,0xf2]
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@ CHECK: vmvn.i32 d16, #0x20FFFF @ encoding: [0x30,0x0d,0xc2,0xf2]
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@ FIXME: vmvn.i16 d16, #0x10 @ encoding: [0x30,0x08,0xc1,0xf2]
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@ FIXME: vmvn.i16 d16, #0x1000 @ encoding: [0x30,0x0a,0xc1,0xf2]
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@ FIXME: vmvn.i32 d16, #0x20 @ encoding: [0x30,0x00,0xc2,0xf2]
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@ FIXME: vmvn.i32 d16, #0x2000 @ encoding: [0x30,0x02,0xc2,0xf2]
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@ FIXME: vmvn.i32 d16, #0x200000 @ encoding: [0x30,0x04,0xc2,0xf2]
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@ FIXME: vmvn.i32 d16, #0x20000000 @ encoding: [0x30,0x06,0xc2,0xf2]
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@ FIXME: vmvn.i32 d16, #0x20FF @ encoding: [0x30,0x0c,0xc2,0xf2]
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@ FIXME: vmvn.i32 d16, #0x20FFFF @ encoding: [0x30,0x0d,0xc2,0xf2]
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vmovl.s8 q8, d16
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vmovl.s16 q8, d16
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@ -106,26 +105,26 @@
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@ CHECK: vqmovun.s32 d16, q8 @ encoding: [0x60,0x02,0xf6,0xf3]
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@ CHECK: vqmovun.s64 d16, q8 @ encoding: [0x60,0x02,0xfa,0xf3]
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vmov.s8 r0, d16[1]
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vmov.s16 r0, d16[1]
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vmov.u8 r0, d16[1]
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vmov.u16 r0, d16[1]
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vmov.32 r0, d16[1]
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vmov.8 d16[1], r1
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vmov.16 d16[1], r1
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vmov.32 d16[1], r1
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vmov.8 d18[1], r1
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vmov.16 d18[1], r1
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vmov.32 d18[1], r1
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@ vmov.s8 r0, d16[1]
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@ vmov.s16 r0, d16[1]
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@ vmov.u8 r0, d16[1]
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@ vmov.u16 r0, d16[1]
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@ vmov.32 r0, d16[1]
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@ vmov.8 d16[1], r1
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@ vmov.16 d16[1], r1
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@ vmov.32 d16[1], r1
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@ vmov.8 d18[1], r1
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@ vmov.16 d18[1], r1
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@ vmov.32 d18[1], r1
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@ CHECK: vmov.s8 r0, d16[1] @ encoding: [0xb0,0x0b,0x50,0xee]
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@ CHECK: vmov.s16 r0, d16[1] @ encoding: [0xf0,0x0b,0x10,0xee]
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@ CHECK: vmov.u8 r0, d16[1] @ encoding: [0xb0,0x0b,0xd0,0xee]
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@ CHECK: vmov.u16 r0, d16[1] @ encoding: [0xf0,0x0b,0x90,0xee]
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@ CHECK: vmov.32 r0, d16[1] @ encoding: [0x90,0x0b,0x30,0xee]
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@ CHECK: vmov.8 d16[1], r1 @ encoding: [0xb0,0x1b,0x40,0xee]
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@ CHECK: vmov.16 d16[1], r1 @ encoding: [0xf0,0x1b,0x00,0xee]
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@ CHECK: vmov.32 d16[1], r1 @ encoding: [0x90,0x1b,0x20,0xee]
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@ CHECK: vmov.8 d18[1], r1 @ encoding: [0xb0,0x1b,0x42,0xee]
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@ CHECK: vmov.16 d18[1], r1 @ encoding: [0xf0,0x1b,0x02,0xee]
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@ CHECK: vmov.32 d18[1], r1 @ encoding: [0x90,0x1b,0x22,0xee]
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@ FIXME: vmov.s8 r0, d16[1] @ encoding: [0xb0,0x0b,0x50,0xee]
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@ FIXME: vmov.s16 r0, d16[1] @ encoding: [0xf0,0x0b,0x10,0xee]
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@ FIXME: vmov.u8 r0, d16[1] @ encoding: [0xb0,0x0b,0xd0,0xee]
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@ FIXME: vmov.u16 r0, d16[1] @ encoding: [0xf0,0x0b,0x90,0xee]
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@ FIXME: vmov.32 r0, d16[1] @ encoding: [0x90,0x0b,0x30,0xee]
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@ FIXME: vmov.8 d16[1], r1 @ encoding: [0xb0,0x1b,0x40,0xee]
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@ FIXME: vmov.16 d16[1], r1 @ encoding: [0xf0,0x1b,0x00,0xee]
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@ FIXME: vmov.32 d16[1], r1 @ encoding: [0x90,0x1b,0x20,0xee]
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@ FIXME: vmov.8 d18[1], r1 @ encoding: [0xb0,0x1b,0x42,0xee]
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@ FIXME: vmov.16 d18[1], r1 @ encoding: [0xf0,0x1b,0x02,0xee]
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@ FIXME: vmov.32 d18[1], r1 @ encoding: [0x90,0x1b,0x22,0xee]
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@ -1,119 +1,131 @@
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@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s
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@ XFAIL: *
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.code 16
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@ CHECK: vmov.i8 d16, #0x8 @ encoding: [0x18,0x0e,0xc0,0xef]
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vmov.i8 d16, #0x8
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@ CHECK: vmov.i16 d16, #0x10 @ encoding: [0x10,0x08,0xc1,0xef]
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vmov.i16 d16, #0x10
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@ CHECK: vmov.i16 d16, #0x1000 @ encoding: [0x10,0x0a,0xc1,0xef]
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vmov.i16 d16, #0x1000
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@ CHECK: vmov.i32 d16, #0x20 @ encoding: [0x10,0x00,0xc2,0xef]
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vmov.i32 d16, #0x20
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@ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0x10,0x02,0xc2,0xef]
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vmov.i32 d16, #0x2000
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@ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0x10,0x04,0xc2,0xef]
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vmov.i32 d16, #0x200000
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@ CHECK: vmov.i32 d16, #0x20000000 @ encoding: [0x10,0x06,0xc2,0xef]
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vmov.i32 d16, #0x20000000
|
||||
@ CHECK: vmov.i32 d16, #0x20FF @ encoding: [0x10,0x0c,0xc2,0xef]
|
||||
vmov.i32 d16, #0x20FF
|
||||
@ CHECK: vmov.i32 d16, #0x20FFFF @ encoding: [0x10,0x0d,0xc2,0xef]
|
||||
vmov.i32 d16, #0x20FFFF
|
||||
@ CHECK: vmov.i64 d16, #0xFF0000FF0000FFFF @ encoding: [0x33,0x0e,0xc1,0xff]
|
||||
vmov.i64 d16, #0xFF0000FF0000FFFF
|
||||
@ CHECK: vmov.i8 q8, #0x8 @ encoding: [0x58,0x0e,0xc0,0xef]
|
||||
@ vmov.i16 d16, #0x10
|
||||
@ vmov.i16 d16, #0x1000
|
||||
@ vmov.i32 d16, #0x20
|
||||
@ vmov.i32 d16, #0x2000
|
||||
@ vmov.i32 d16, #0x200000
|
||||
@ vmov.i32 d16, #0x20000000
|
||||
@ vmov.i32 d16, #0x20FF
|
||||
@ vmov.i32 d16, #0x20FFFF
|
||||
@ vmov.i64 d16, #0xFF0000FF0000FFFF
|
||||
|
||||
@ CHECK: vmov.i8 d16, #0x8 @ encoding: [0xc0,0xef,0x18,0x0e]
|
||||
@ FIXME: vmov.i16 d16, #0x10 @ encoding: [0xc1,0xef,0x10,0x08]
|
||||
@ FIXME: vmov.i16 d16, #0x1000 @ encoding: [0xc1,0xef,0x10,0x0a]
|
||||
@ FIXME: vmov.i32 d16, #0x20 @ encoding: [0xc2,0xef,0x10,0x00]
|
||||
@ FIXME: vmov.i32 d16, #0x2000 @ encoding: [0xc2,0xef,0x10,0x02]
|
||||
@ FIXME: vmov.i32 d16, #0x200000 @ encoding: [0xc2,0xef,0x10,0x04]
|
||||
@ FIXME: vmov.i32 d16, #0x20000000 @ encoding: [0xc2,0xef,0x10,0x06]
|
||||
@ FIXME: vmov.i32 d16, #0x20FF @ encoding: [0xc2,0xef,0x10,0x0c]
|
||||
@ FIXME: vmov.i32 d16, #0x20FFFF @ encoding: [0xc2,0xef,0x10,0x0d]
|
||||
@ FIXME: vmov.i64 d16, #0xFF0000FF0000FFFF @ encoding: [0xc1,0xff,0x33,0x0e]
|
||||
|
||||
|
||||
vmov.i8 q8, #0x8
|
||||
@ CHECK: vmov.i16 q8, #0x10 @ encoding: [0x50,0x08,0xc1,0xef]
|
||||
vmov.i16 q8, #0x10
|
||||
@ CHECK: vmov.i16 q8, #0x1000 @ encoding: [0x50,0x0a,0xc1,0xef]
|
||||
vmov.i16 q8, #0x1000
|
||||
@ CHECK: vmov.i32 q8, #0x20 @ encoding: [0x50,0x00,0xc2,0xef]
|
||||
vmov.i32 q8, #0x20
|
||||
@ CHECK: vmov.i32 q8, #0x2000 @ encoding: [0x50,0x02,0xc2,0xef]
|
||||
vmov.i32 q8, #0x2000
|
||||
@ CHECK: vmov.i32 q8, #0x200000 @ encoding: [0x50,0x04,0xc2,0xef]
|
||||
vmov.i32 q8, #0x200000
|
||||
@ CHECK: vmov.i32 q8, #0x20000000 @ encoding: [0x50,0x06,0xc2,0xef]
|
||||
vmov.i32 q8, #0x20000000
|
||||
@ CHECK: vmov.i32 q8, #0x20FF @ encoding: [0x50,0x0c,0xc2,0xef]
|
||||
vmov.i32 q8, #0x20FF
|
||||
@ CHECK: vmov.i32 q8, #0x20FFFF @ encoding: [0x50,0x0d,0xc2,0xef]
|
||||
vmov.i32 q8, #0x20FFFF
|
||||
@ CHECK: vmov.i64 q8, #0xFF0000FF0000FFFF @ encoding: [0x73,0x0e,0xc1,0xff]
|
||||
vmov.i64 q8, #0xFF0000FF0000FFFF
|
||||
@ CHECK: vmvn.i16 d16, #0x10 @ encoding: [0x30,0x08,0xc1,0xef]
|
||||
vmvn.i16 d16, #0x10
|
||||
@ CHECK: vmvn.i16 d16, #0x1000 @ encoding: [0x30,0x0a,0xc1,0xef]
|
||||
vmvn.i16 d16, #0x1000
|
||||
@ CHECK: vmvn.i32 d16, #0x20 @ encoding: [0x30,0x00,0xc2,0xef]
|
||||
vmvn.i32 d16, #0x20
|
||||
@ CHECK: vmvn.i32 d16, #0x2000 @ encoding: [0x30,0x02,0xc2,0xef]
|
||||
vmvn.i32 d16, #0x2000
|
||||
@ CHECK: vmvn.i32 d16, #0x200000 @ encoding: [0x30,0x04,0xc2,0xef]
|
||||
vmvn.i32 d16, #0x200000
|
||||
@ CHECK: vmvn.i32 d16, #0x20000000 @ encoding: [0x30,0x06,0xc2,0xef]
|
||||
vmvn.i32 d16, #0x20000000
|
||||
@ CHECK: vmvn.i32 d16, #0x20FF @ encoding: [0x30,0x0c,0xc2,0xef]
|
||||
vmvn.i32 d16, #0x20FF
|
||||
@ CHECK: vmvn.i32 d16, #0x20FFFF @ encoding: [0x30,0x0d,0xc2,0xef]
|
||||
vmvn.i32 d16, #0x20FFFF
|
||||
@ CHECK: vmovl.s8 q8, d16 @ encoding: [0x30,0x0a,0xc8,0xef]
|
||||
@ vmov.i16 q8, #0x10
|
||||
@ vmov.i16 q8, #0x1000
|
||||
@ vmov.i32 q8, #0x20
|
||||
@ vmov.i32 q8, #0x2000
|
||||
@ vmov.i32 q8, #0x200000
|
||||
@ vmov.i32 q8, #0x20000000
|
||||
@ vmov.i32 q8, #0x20FF
|
||||
@ vmov.i32 q8, #0x20FFFF
|
||||
@ vmov.i64 q8, #0xFF0000FF0000FFFF
|
||||
|
||||
@ CHECK: vmov.i8 q8, #0x8 @ encoding: [0xc0,0xef,0x58,0x0e]
|
||||
@ FIXME: vmov.i16 q8, #0x10 @ encoding: [0xc1,0xef,0x50,0x08]
|
||||
@ FIXME: vmov.i16 q8, #0x1000 @ encoding: [0xc1,0xef,0x50,0x0a]
|
||||
@ FIXME: vmov.i32 q8, #0x20 @ encoding: [0xc2,0xef,0x50,0x00]
|
||||
@ FIXME: vmov.i32 q8, #0x2000 @ encoding: [0xc2,0xef,0x50,0x02]
|
||||
@ FIXME: vmov.i32 q8, #0x200000 @ encoding: [0xc2,0xef,0x50,0x04]
|
||||
@ FIXME: vmov.i32 q8, #0x20000000 @ encoding: [0xc2,0xef,0x50,0x06]
|
||||
@ FIXME: vmov.i32 q8, #0x20FF @ encoding: [0xc2,0xef,0x50,0x0c]
|
||||
@ FIXME: vmov.i32 q8, #0x20FFFF @ encoding: [0xc2,0xef,0x50,0x0d]
|
||||
@ FIXME: vmov.i64 q8, #0xFF0000FF0000FFFF @ encoding: [0xc1,0xff,0x73,0x0e]
|
||||
|
||||
|
||||
@ vmvn.i16 d16, #0x10
|
||||
@ vmvn.i16 d16, #0x1000
|
||||
@ vmvn.i32 d16, #0x20
|
||||
@ vmvn.i32 d16, #0x2000
|
||||
@ vmvn.i32 d16, #0x200000
|
||||
@ vmvn.i32 d16, #0x20000000
|
||||
@ vmvn.i32 d16, #0x20FF
|
||||
@ vmvn.i32 d16, #0x20FFFF
|
||||
|
||||
@ FIXME: vmvn.i16 d16, #0x10 @ encoding: [0xc1,0xef,0x30,0x08]
|
||||
@ FIXME: vmvn.i16 d16, #0x1000 @ encoding: [0xc1,0xef,0x30,0x0a]
|
||||
@ FIXME: vmvn.i32 d16, #0x20 @ encoding: [0xc2,0xef,0x30,0x00]
|
||||
@ FIXME: vmvn.i32 d16, #0x2000 @ encoding: [0xc2,0xef,0x30,0x02]
|
||||
@ FIXME: vmvn.i32 d16, #0x200000 @ encoding: [0xc2,0xef,0x30,0x04]
|
||||
@ FIXME: vmvn.i32 d16, #0x20000000 @ encoding: [0xc2,0xef,0x30,0x06]
|
||||
@ FIXME: vmvn.i32 d16, #0x20FF @ encoding: [0xc2,0xef,0x30,0x0c]
|
||||
@ FIXME: vmvn.i32 d16, #0x20FFFF @ encoding: [0xc2,0xef,0x30,0x0d]
|
||||
|
||||
|
||||
vmovl.s8 q8, d16
|
||||
@ CHECK: vmovl.s16 q8, d16 @ encoding: [0x30,0x0a,0xd0,0xef]
|
||||
vmovl.s16 q8, d16
|
||||
@ CHECK: vmovl.s32 q8, d16 @ encoding: [0x30,0x0a,0xe0,0xef]
|
||||
vmovl.s32 q8, d16
|
||||
@ CHECK: vmovl.u8 q8, d16 @ encoding: [0x30,0x0a,0xc8,0xff]
|
||||
vmovl.u8 q8, d16
|
||||
@ CHECK: vmovl.u16 q8, d16 @ encoding: [0x30,0x0a,0xd0,0xff]
|
||||
vmovl.u16 q8, d16
|
||||
@ CHECK: vmovl.u32 q8, d16 @ encoding: [0x30,0x0a,0xe0,0xff]
|
||||
vmovl.u32 q8, d16
|
||||
@ CHECK: vmovn.i16 d16, q8 @ encoding: [0x20,0x02,0xf2,0xff]
|
||||
vmovn.i16 d16, q8
|
||||
@ CHECK: vmovn.i32 d16, q8 @ encoding: [0x20,0x02,0xf6,0xff]
|
||||
vmovn.i32 d16, q8
|
||||
@ CHECK: vmovn.i64 d16, q8 @ encoding: [0x20,0x02,0xfa,0xff]
|
||||
vmovn.i64 d16, q8
|
||||
@ CHECK: vqmovn.s16 d16, q8 @ encoding: [0xa0,0x02,0xf2,0xff]
|
||||
vqmovn.s16 d16, q8
|
||||
@ CHECK: vqmovn.s32 d16, q8 @ encoding: [0xa0,0x02,0xf6,0xff]
|
||||
vqmovn.s32 d16, q8
|
||||
@ CHECK: vqmovn.s64 d16, q8 @ encoding: [0xa0,0x02,0xfa,0xff]
|
||||
vqmovn.s64 d16, q8
|
||||
@ CHECK: vqmovn.u16 d16, q8 @ encoding: [0xe0,0x02,0xf2,0xff]
|
||||
vqmovn.u16 d16, q8
|
||||
@ CHECK: vqmovn.u32 d16, q8 @ encoding: [0xe0,0x02,0xf6,0xff]
|
||||
vqmovn.u32 d16, q8
|
||||
@ CHECK: vqmovn.u64 d16, q8 @ encoding: [0xe0,0x02,0xfa,0xff]
|
||||
vqmovn.u64 d16, q8
|
||||
@ CHECK: vqmovun.s16 d16, q8 @ encoding: [0x60,0x02,0xf2,0xff]
|
||||
vqmovun.s16 d16, q8
|
||||
@ CHECK: vqmovun.s32 d16, q8 @ encoding: [0x60,0x02,0xf6,0xff]
|
||||
vqmovun.s32 d16, q8
|
||||
@ CHECK: vqmovun.s64 d16, q8 @ encoding: [0x60,0x02,0xfa,0xff]
|
||||
vqmovun.s64 d16, q8
|
||||
@ CHECK: vmov.s8 r0, d16[1] @ encoding: [0xb0,0x0b,0x50,0xee]
|
||||
vmov.s8 r0, d16[1]
|
||||
@ CHECK: vmov.s16 r0, d16[1] @ encoding: [0xf0,0x0b,0x10,0xee]
|
||||
vmov.s16 r0, d16[1]
|
||||
@ CHECK: vmov.u8 r0, d16[1] @ encoding: [0xb0,0x0b,0xd0,0xee]
|
||||
vmov.u8 r0, d16[1]
|
||||
@ CHECK: vmov.u16 r0, d16[1] @ encoding: [0xf0,0x0b,0x90,0xee]
|
||||
vmov.u16 r0, d16[1]
|
||||
@ CHECK: vmov.32 r0, d16[1] @ encoding: [0x90,0x0b,0x30,0xee]
|
||||
vmov.32 r0, d16[1]
|
||||
@ CHECK: vmov.8 d16[1], r1 @ encoding: [0xb0,0x1b,0x40,0xee]
|
||||
vmov.8 d16[1], r1
|
||||
@ CHECK: vmov.16 d16[1], r1 @ encoding: [0xf0,0x1b,0x00,0xee]
|
||||
vmov.16 d16[1], r1
|
||||
@ CHECK: vmov.32 d16[1], r1 @ encoding: [0x90,0x1b,0x20,0xee]
|
||||
vmov.32 d16[1], r1
|
||||
@ CHECK: vmov.8 d18[1], r1 @ encoding: [0xb0,0x1b,0x42,0xee]
|
||||
vmov.8 d18[1], r1
|
||||
@ CHECK: vmov.16 d18[1], r1 @ encoding: [0xf0,0x1b,0x02,0xee]
|
||||
vmov.16 d18[1], r1
|
||||
@ CHECK: vmov.32 d18[1], r1 @ encoding: [0x90,0x1b,0x22,0xee]
|
||||
vmov.32 d18[1], r1
|
||||
|
||||
@ CHECK: vmovl.s8 q8, d16 @ encoding: [0xc8,0xef,0x30,0x0a]
|
||||
@ CHECK: vmovl.s16 q8, d16 @ encoding: [0xd0,0xef,0x30,0x0a]
|
||||
@ CHECK: vmovl.s32 q8, d16 @ encoding: [0xe0,0xef,0x30,0x0a]
|
||||
@ CHECK: vmovl.u8 q8, d16 @ encoding: [0xc8,0xff,0x30,0x0a]
|
||||
@ CHECK: vmovl.u16 q8, d16 @ encoding: [0xd0,0xff,0x30,0x0a]
|
||||
@ CHECK: vmovl.u32 q8, d16 @ encoding: [0xe0,0xff,0x30,0x0a]
|
||||
@ CHECK: vmovn.i16 d16, q8 @ encoding: [0xf2,0xff,0x20,0x02]
|
||||
@ CHECK: vmovn.i32 d16, q8 @ encoding: [0xf6,0xff,0x20,0x02]
|
||||
@ CHECK: vmovn.i64 d16, q8 @ encoding: [0xfa,0xff,0x20,0x02]
|
||||
@ CHECK: vqmovn.s16 d16, q8 @ encoding: [0xf2,0xff,0xa0,0x02]
|
||||
@ CHECK: vqmovn.s32 d16, q8 @ encoding: [0xf6,0xff,0xa0,0x02]
|
||||
@ CHECK: vqmovn.s64 d16, q8 @ encoding: [0xfa,0xff,0xa0,0x02]
|
||||
@ CHECK: vqmovn.u16 d16, q8 @ encoding: [0xf2,0xff,0xe0,0x02]
|
||||
@ CHECK: vqmovn.u32 d16, q8 @ encoding: [0xf6,0xff,0xe0,0x02]
|
||||
@ CHECK: vqmovn.u64 d16, q8 @ encoding: [0xfa,0xff,0xe0,0x02]
|
||||
@ CHECK: vqmovun.s16 d16, q8 @ encoding: [0xf2,0xff,0x60,0x02]
|
||||
@ CHECK: vqmovun.s32 d16, q8 @ encoding: [0xf6,0xff,0x60,0x02]
|
||||
@ CHECK: vqmovun.s64 d16, q8 @ encoding: [0xfa,0xff,0x60,0x02]
|
||||
|
||||
|
||||
@ vmov.s8 r0, d16[1]
|
||||
@ vmov.s16 r0, d16[1]
|
||||
@ vmov.u8 r0, d16[1]
|
||||
@ vmov.u16 r0, d16[1]
|
||||
@ vmov.32 r0, d16[1]
|
||||
@ vmov.8 d16[1], r1
|
||||
@ vmov.16 d16[1], r1
|
||||
@ vmov.32 d16[1], r1
|
||||
@ vmov.8 d18[1], r1
|
||||
@ vmov.16 d18[1], r1
|
||||
@ vmov.32 d18[1], r1
|
||||
|
||||
@ FIXME: vmov.s8 r0, d16[1] @ encoding: [0x50,0xee,0xb0,0x0b]
|
||||
@ FIXME: vmov.s16 r0, d16[1] @ encoding: [0x10,0xee,0xf0,0x0b]
|
||||
@ FIXME: vmov.u8 r0, d16[1] @ encoding: [0xd0,0xee,0xb0,0x0b]
|
||||
@ FIXME: vmov.u16 r0, d16[1] @ encoding: [0x90,0xee,0xf0,0x0b]
|
||||
@ FIXME: vmov.32 r0, d16[1] @ encoding: [0x30,0xee,0x90,0x0b]
|
||||
@ FIXME: vmov.8 d16[1], r1 @ encoding: [0x40,0xee,0xb0,0x1b]
|
||||
@ FIXME: vmov.16 d16[1], r1 @ encoding: [0x00,0xee,0xf0,0x1b]
|
||||
@ FIXME: vmov.32 d16[1], r1 @ encoding: [0x20,0xee,0x90,0x1b]
|
||||
@ FIXME: vmov.8 d18[1], r1 @ encoding: [0x42,0xee,0xb0,0x1b]
|
||||
@ FIXME: vmov.16 d18[1], r1 @ encoding: [0x02,0xee,0xf0,0x1b]
|
||||
@ FIXME: vmov.32 d18[1], r1 @ encoding: [0x22,0xee,0x90,0x1b]
|
||||
|
|
|
|||
|
|
@ -597,6 +597,7 @@ static int ARMFlagFromOpName(LiteralConstantEmitter *type,
|
|||
IMM("imm1_16");
|
||||
IMM("imm1_32");
|
||||
IMM("nModImm");
|
||||
IMM("nImmSplatI8");
|
||||
IMM("imm0_7");
|
||||
IMM("imm0_15");
|
||||
IMM("imm0_255");
|
||||
|
|
|
|||
Loading…
Reference in New Issue