[LLD][ELF] - Support MSP430.
Patch by Michael Skvortsov! This change adds a basic support for linking static MSP430 ELF code. Implemented relocation types are intended to correspond to the BFD. Differential revision: https://reviews.llvm.org/D56535 llvm-svn: 350819
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//===- MSP430.cpp ---------------------------------------------------------===//
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//
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// The LLVM Linker
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// The MSP430 is a 16-bit microcontroller RISC architecture. The instruction set
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// has only 27 core instructions orthogonally augmented with a variety
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// of addressing modes for source and destination operands. Entire address space
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// of MSP430 is 64KB (the extended MSP430X architecture is not considered here).
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// A typical MSP430 MCU has several kilobytes of RAM and ROM, plenty
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// of peripherals and is generally optimized for a low power consumption.
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//
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//===----------------------------------------------------------------------===//
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#include "InputFiles.h"
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#include "Symbols.h"
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#include "Target.h"
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#include "lld/Common/ErrorHandler.h"
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#include "llvm/Object/ELF.h"
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#include "llvm/Support/Endian.h"
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using namespace llvm;
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using namespace llvm::object;
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using namespace llvm::support::endian;
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using namespace llvm::ELF;
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using namespace lld;
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using namespace lld::elf;
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namespace {
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class MSP430 final : public TargetInfo {
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public:
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MSP430();
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RelExpr getRelExpr(RelType Type, const Symbol &S,
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const uint8_t *Loc) const override;
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void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
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};
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} // namespace
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MSP430::MSP430() {
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// mov.b #0, r3
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TrapInstr = {0x43, 0x43};
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}
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RelExpr MSP430::getRelExpr(RelType Type, const Symbol &S,
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const uint8_t *Loc) const {
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switch (Type) {
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case R_MSP430_10_PCREL:
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case R_MSP430_16_PCREL:
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case R_MSP430_16_PCREL_BYTE:
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case R_MSP430_2X_PCREL:
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case R_MSP430_RL_PCREL:
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case R_MSP430_SYM_DIFF:
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return R_PC;
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default:
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return R_ABS;
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}
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}
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void MSP430::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
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switch (Type) {
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case R_MSP430_8:
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checkIntUInt(Loc, Val, 8, Type);
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*Loc = Val;
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break;
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case R_MSP430_16:
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case R_MSP430_16_PCREL:
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case R_MSP430_16_BYTE:
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case R_MSP430_16_PCREL_BYTE:
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checkIntUInt(Loc, Val, 16, Type);
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write16le(Loc, Val);
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break;
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case R_MSP430_32:
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checkIntUInt(Loc, Val, 32, Type);
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write32le(Loc, Val);
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break;
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case R_MSP430_10_PCREL: {
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int16_t Offset = ((int16_t)Val >> 1) - 1;
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checkInt(Loc, Offset, 10, Type);
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write16le(Loc, (read16le(Loc) & 0xFC00) | (Offset & 0x3FF));
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break;
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}
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default:
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error(getErrorLocation(Loc) + "unrecognized reloc " + toString(Type));
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}
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}
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TargetInfo *elf::getMSP430TargetInfo() {
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static MSP430 Target;
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return &Target;
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}
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@ -15,6 +15,7 @@ add_lld_library(lldELF
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Arch/Hexagon.cpp
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Arch/Mips.cpp
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Arch/MipsArchTree.cpp
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Arch/MSP430.cpp
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Arch/PPC.cpp
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Arch/PPC64.cpp
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Arch/RISCV.cpp
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@ -1081,6 +1081,8 @@ static uint8_t getBitcodeMachineKind(StringRef Path, const Triple &T) {
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case Triple::mips64:
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case Triple::mips64el:
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return EM_MIPS;
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case Triple::msp430:
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return EM_MSP430;
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case Triple::ppc:
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return EM_PPC;
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case Triple::ppc64:
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@ -75,6 +75,8 @@ TargetInfo *elf::getTarget() {
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default:
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llvm_unreachable("unsupported MIPS target");
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}
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case EM_MSP430:
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return getMSP430TargetInfo();
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case EM_PPC:
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return getPPCTargetInfo();
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case EM_PPC64:
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@ -146,6 +146,7 @@ TargetInfo *getAMDGPUTargetInfo();
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TargetInfo *getARMTargetInfo();
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TargetInfo *getAVRTargetInfo();
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TargetInfo *getHexagonTargetInfo();
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TargetInfo *getMSP430TargetInfo();
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TargetInfo *getPPC64TargetInfo();
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TargetInfo *getPPCTargetInfo();
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TargetInfo *getRISCVTargetInfo();
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@ -0,0 +1,4 @@
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.text
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.global _start
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_start:
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nop
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@ -72,6 +72,7 @@ llvm_config.feature_config(
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'AVR': 'avr',
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'Hexagon': 'hexagon',
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'Mips': 'mips',
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'MSP430': 'msp430',
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'PowerPC': 'ppc',
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'RISCV': 'riscv',
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'Sparc': 'sparc',
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