parent
f2b50994ca
commit
7212c15e70
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@ -82,9 +82,9 @@ bool MSP430DAGToDAGISel::SelectAddr(SDValue Op, SDValue Addr,
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return true;
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}
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// Operand is a result from ADD with constant operand which fits into i16.
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switch (Addr.getOpcode()) {
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case ISD::ADD:
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// Operand is a result from ADD with constant operand which fits into i16.
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if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
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uint64_t CVal = CN->getZExtValue();
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// Offset should fit into 16 bits.
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@ -54,6 +54,10 @@ MSP430TargetLowering::MSP430TargetLowering(MSP430TargetMachine &tm) :
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// shifts of the whole bitwidth 1 bit per step.
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setShiftAmountType(MVT::i8);
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setStackPointerRegisterToSaveRestore(MSP430::SPW);
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setBooleanContents(ZeroOrOneBooleanContent);
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setSchedulingPreference(SchedulingForLatency);
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setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
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setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
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setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
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