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Small tweaking 

llvm-svn: 70741
This commit is contained in:
Anton Korobeynikov 2009-05-03 13:11:35 +00:00
parent f2b50994ca
commit 7212c15e70
2 changed files with 6 additions and 2 deletions
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4
llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
View File

@ -82,10 +82,10 @@ bool MSP430DAGToDAGISel::SelectAddr(SDValue Op, SDValue Addr,
return true;
}
// Operand is a result from ADD with constant operand which fits into i16.
switch (Addr.getOpcode()) {
case ISD::ADD:
if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
// Operand is a result from ADD with constant operand which fits into i16.
if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
uint64_t CVal = CN->getZExtValue();
// Offset should fit into 16 bits.
if (((CVal << 48) >> 48) == CVal) {

4
llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
View File

@ -54,6 +54,10 @@ MSP430TargetLowering::MSP430TargetLowering(MSP430TargetMachine &tm) :
// shifts of the whole bitwidth 1 bit per step.
setShiftAmountType(MVT::i8);
setStackPointerRegisterToSaveRestore(MSP430::SPW);
setBooleanContents(ZeroOrOneBooleanContent);
setSchedulingPreference(SchedulingForLatency);
setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);