Use new TargetLowering addressing modes hooks.

llvm-svn: 35072
This commit is contained in:
Evan Cheng 2007-03-12 23:27:37 +00:00
parent 6486974e8d
commit 720acdfb31
1 changed files with 18 additions and 20 deletions

View File

@ -612,12 +612,12 @@ void BasedUser::RewriteInstructionToUseNewBase(const SCEVHandle &NewBase,
/// immediate field of a target instruction. /// immediate field of a target instruction.
static bool isTargetConstant(const SCEVHandle &V, const TargetLowering *TLI) { static bool isTargetConstant(const SCEVHandle &V, const TargetLowering *TLI) {
if (SCEVConstant *SC = dyn_cast<SCEVConstant>(V)) { if (SCEVConstant *SC = dyn_cast<SCEVConstant>(V)) {
int64_t V = SC->getValue()->getSExtValue(); int64_t VC = SC->getValue()->getSExtValue();
if (TLI) if (TLI)
return TLI->isLegalAddressImmediate(V); return TLI->isLegalAddressImmediate(VC, V->getType());
else else
// Defaults to PPC. PPC allows a sign-extended 16-bit immediate field. // Defaults to PPC. PPC allows a sign-extended 16-bit immediate field.
return (V > -(1 << 16) && V < (1 << 16)-1); return (VC > -(1 << 16) && VC < (1 << 16)-1);
} }
if (SCEVUnknown *SU = dyn_cast<SCEVUnknown>(V)) if (SCEVUnknown *SU = dyn_cast<SCEVUnknown>(V))
@ -878,24 +878,22 @@ unsigned LoopStrengthReduce::CheckForIVReuse(const SCEVHandle &Stride,
int64_t SInt = SC->getValue()->getSExtValue(); int64_t SInt = SC->getValue()->getSExtValue();
if (SInt == 1) return 0; if (SInt == 1) return 0;
for (TargetLowering::legal_am_scale_iterator for (std::map<SCEVHandle, IVsOfOneStride>::iterator SI= IVsByStride.begin(),
I = TLI->legal_am_scale_begin(), E = TLI->legal_am_scale_end(); SE = IVsByStride.end(); SI != SE; ++SI) {
I != E; ++I) { int64_t SSInt = cast<SCEVConstant>(SI->first)->getValue()->getSExtValue();
unsigned Scale = *I; if (unsigned(abs(SInt)) < SSInt || (SInt % SSInt) != 0)
if (unsigned(abs(SInt)) < Scale || (SInt % Scale) != 0)
continue; continue;
std::map<SCEVHandle, IVsOfOneStride>::iterator SI = int64_t Scale = SInt / SSInt;
IVsByStride.find(SCEVUnknown::getIntegerSCEV(SInt/Scale, UIntPtrTy)); if (TLI->isLegalAddressScale(Scale, Ty)) {
if (SI == IVsByStride.end()) for (std::vector<IVExpr>::iterator II = SI->second.IVs.begin(),
continue; IE = SI->second.IVs.end(); II != IE; ++II)
for (std::vector<IVExpr>::iterator II = SI->second.IVs.begin(), // FIXME: Only handle base == 0 for now.
IE = SI->second.IVs.end(); II != IE; ++II) // Only reuse previous IV if it would not require a type conversion.
// FIXME: Only handle base == 0 for now. if (isZero(II->Base) && II->Base->getType() == Ty) {
// Only reuse previous IV if it would not require a type conversion. IV = *II;
if (isZero(II->Base) && II->Base->getType() == Ty) { return Scale;
IV = *II; }
return Scale; }
}
} }
} }