[AArch64] Keep flags on condition vreg when instantiating a CB branch.

Reversing a CB* instruction used to drop the flags on the condition. On the
included testcase, this lead to a read from an undefined vreg.
Using addOperand keeps the flags, here <undef>.

Differential Revision: http://reviews.llvm.org/D6159

llvm-svn: 221507
This commit is contained in:
Ahmed Bougacha 2014-11-07 02:50:00 +00:00
parent 2685de1077
commit 72001cf287
2 changed files with 28 additions and 1 deletions

View File

@ -261,8 +261,9 @@ void AArch64InstrInfo::instantiateCondBranch(
BuildMI(&MBB, DL, get(AArch64::Bcc)).addImm(Cond[0].getImm()).addMBB(TBB);
} else {
// Folded compare-and-branch
// Note that we use addOperand instead of addReg to keep the flags.
const MachineInstrBuilder MIB =
BuildMI(&MBB, DL, get(Cond[1].getImm())).addReg(Cond[2].getReg());
BuildMI(&MBB, DL, get(Cond[1].getImm())).addOperand(Cond[2]);
if (Cond.size() > 3)
MIB.addImm(Cond[3].getImm());
MIB.addMBB(TBB);

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@ -0,0 +1,26 @@
; RUN: llc < %s -verify-machineinstrs
; Make sure we don't end up with a CBNZ of an undef v-/phys-reg.
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-ios"
declare void @bar(i8*)
define void @foo(i8* %m, i32 %off0) {
.thread1653:
br i1 undef, label %0, label %.thread1880
%1 = icmp eq i32 undef, 0
%.not = xor i1 %1, true
%brmerge = or i1 %.not, undef
br i1 %brmerge, label %.thread1880, label %.thread1705
.thread1705:
ret void
.thread1880:
%m1652.ph = phi i8* [ %m, %0 ], [ null, %.thread1653 ]
call void @bar(i8* %m1652.ph)
ret void
}