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AArch64/ARM64: enable more AArch64 tests. 

llvm-svn: 209408
This commit is contained in:
Tim Northover 2014-05-22 07:40:55 +00:00
parent c65a66ddfe
commit 71d04225cf
3 changed files with 9 additions and 6 deletions
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1
llvm/test/CodeGen/AArch64/neon-simd-post-ldst-multi-elem.ll
View File

@ -1,4 +1,5 @@
; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
; arm64 has equivalent tests to these in various files.
;Check for a post-increment updating load.
define <4 x i16> @test_vld1_fx_update(i16** %ptr) nounwind {

1
llvm/test/CodeGen/AArch64/neon-simd-post-ldst-one.ll
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@ -1,4 +1,5 @@
; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
; arm64 has equivalents of these tests separately.
define { [2 x <16 x i8>] } @test_vld2q_dup_fx_update(i8* %a, i8** %ptr) {
; CHECK-LABEL: test_vld2q_dup_fx_update

13
llvm/test/CodeGen/AArch64/sibling-call.ll
View File

@ -1,4 +1,5 @@
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -mtriple=arm64-none-linux-gnu -arm64-load-store-opt=0 | FileCheck %s
declare void @callee_stack0()
declare void @callee_stack8([8 x i32], i64)
@ -73,10 +74,10 @@ define void @caller_to16_from16([8 x i32], i64 %a, i64 %b) {
tail call void @callee_stack16([8 x i32] undef, i64 %b, i64 %a)
ret void
; CHECK: ldr x0,
; CHECK: ldr x1,
; CHECK: str x1,
; CHECK: str x0,
; CHECK: ldr [[VAL0:x[0-9]+]],
; CHECK: ldr [[VAL1:x[0-9]+]],
; CHECK: str [[VAL1]],
; CHECK: str [[VAL0]],
; CHECK-NOT: add sp, sp,
; CHECK: b callee_stack16
@ -91,7 +92,7 @@ define void @indirect_tail() {
%fptr = load void(i32)** @func
tail call void %fptr(i32 42)
ret void
; CHECK: ldr [[FPTR:x[1-9]+]], [{{x[0-9]+}}, #:lo12:func]
; CHECK: movz w0, #42
; CHECK: ldr [[FPTR:x[1-9]+]], [{{x[0-9]+}}, {{#?}}:lo12:func]
; CHECK: movz w0, #{{42|0x2a}}
; CHECK: br [[FPTR]]
}