Documentation: convert WritingAnLLVMBackend.html to reST

llvm-svn: 169087
This commit is contained in:
Dmitri Gribenko 2012-12-01 12:13:48 +00:00
parent 5586bdfd2a
commit 7174c5a074
4 changed files with 1842 additions and 2559 deletions

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@ -250,6 +250,8 @@ operations. Among other things, this class indicates:
* various high-level characteristics, like whether it is profitable to turn * various high-level characteristics, like whether it is profitable to turn
division by a constant into a multiplication sequence. division by a constant into a multiplication sequence.
.. _TargetRegisterInfo:
The ``TargetRegisterInfo`` class The ``TargetRegisterInfo`` class
-------------------------------- --------------------------------
@ -771,6 +773,8 @@ value of type i1, i8, i16, or i64 would be illegal, as would a DAG that uses a
SREM or UREM operation. The `legalize types`_ and `legalize operations`_ phases SREM or UREM operation. The `legalize types`_ and `legalize operations`_ phases
are responsible for turning an illegal DAG into a legal DAG. are responsible for turning an illegal DAG into a legal DAG.
.. _SelectionDAG-Process:
SelectionDAG Instruction Selection Process SelectionDAG Instruction Selection Process
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

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@ -21,6 +21,7 @@ Subsystem Documentation
HowToUseInstrMappings HowToUseInstrMappings
SystemLibrary SystemLibrary
SourceLevelDebugging SourceLevelDebugging
WritingAnLLVMBackend
.. FIXME: once LangRef is Sphinxified, HowToUseInstrMappings should be put .. FIXME: once LangRef is Sphinxified, HowToUseInstrMappings should be put
under LangRef's toctree instead of this page's toctree. under LangRef's toctree instead of this page's toctree.
@ -29,8 +30,8 @@ Subsystem Documentation
Information on how to write LLVM transformations and analyses. Information on how to write LLVM transformations and analyses.
* `Writing an LLVM Backend <WritingAnLLVMBackend.html>`_ * :doc:`WritingAnLLVMBackend`
Information on how to write LLVM backends for machine targets. Information on how to write LLVM backends for machine targets.
* :ref:`code_generator` * :ref:`code_generator`