Reuse the MO variable instead of recomputing it in RegAllocLocal.
Keep RegAllocSimple in sync. llvm-svn: 53351
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@ -839,7 +839,7 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
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getVirtRegLastUse(DestVirtReg) = std::make_pair((MachineInstr*)0, 0);
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DOUT << " Assigning " << TRI->getName(DestPhysReg)
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<< " to %reg" << DestVirtReg << "\n";
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MI->getOperand(i).setReg(DestPhysReg); // Assign the output register
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MO.setReg(DestPhysReg); // Assign the output register
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}
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}
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@ -188,12 +188,12 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
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// Loop over uses, move from memory into registers.
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for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
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MachineOperand &op = MI->getOperand(i);
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MachineOperand &MO = MI->getOperand(i);
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if (op.isRegister() && op.getReg() &&
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TargetRegisterInfo::isVirtualRegister(op.getReg())) {
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unsigned virtualReg = (unsigned) op.getReg();
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DOUT << "op: " << op << "\n";
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if (MO.isRegister() && MO.getReg() &&
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TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
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unsigned virtualReg = (unsigned) MO.getReg();
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DOUT << "op: " << MO << "\n";
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DOUT << "\t inst[" << i << "]: ";
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DEBUG(MI->print(*cerr.stream(), TM));
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@ -201,7 +201,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
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// register in any given instruction
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unsigned physReg = Virt2PhysRegMap[virtualReg];
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if (physReg == 0) {
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if (op.isDef()) {
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if (MO.isDef()) {
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int TiedOp = Desc.findTiedToSrcOperand(i);
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if (TiedOp == -1) {
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physReg = getFreeReg(virtualReg);
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@ -222,8 +222,8 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
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Virt2PhysRegMap[virtualReg] = physReg;
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}
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}
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MI->getOperand(i).setReg(physReg);
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DOUT << "virt: " << virtualReg << ", phys: " << op.getReg() << "\n";
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MO.setReg(physReg);
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DOUT << "virt: " << virtualReg << ", phys: " << MO.getReg() << "\n";
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}
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}
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RegClassIdx.clear();
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