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Make the demanded bits/elements optimizations preserve debug line information. 

I'm not sure this is quite ideal, but I can't really think of any better way to do it.

llvm-svn: 131616
This commit is contained in:
Eli Friedman 2011-05-19 01:20:42 +00:00
parent d746478404
commit 6efb64ea8e
2 changed files with 23 additions and 15 deletions
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10
llvm/lib/Transforms/InstCombine/InstCombine.h
View File

@ -233,7 +233,15 @@ public:
Worklist.Add(New); Worklist.Add(New);
return New; return New;
} }
// InsertNewInstWith - same as InsertNewInstBefore, but also sets the
// debug loc.
//
Instruction *InsertNewInstWith(Instruction *New, Instruction &Old) {
New->setDebugLoc(Old.getDebugLoc());
return InsertNewInstBefore(New, Old);
}
// ReplaceInstUsesWith - This method is to be used when an instruction is // ReplaceInstUsesWith - This method is to be used when an instruction is
// found to be dead, replacable with another preexisting expression. Here // found to be dead, replacable with another preexisting expression. Here
// we add all uses of I to the worklist, replace all uses of I with the new // we add all uses of I to the worklist, replace all uses of I with the new

28
llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
View File

@ -313,7 +313,7 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
Instruction *Or = Instruction *Or =
BinaryOperator::CreateOr(I->getOperand(0), I->getOperand(1), BinaryOperator::CreateOr(I->getOperand(0), I->getOperand(1),
I->getName()); I->getName());
return InsertNewInstBefore(Or, *I); return InsertNewInstWith(Or, *I);
} }
// If all of the demanded bits on one side are known, and all of the set // If all of the demanded bits on one side are known, and all of the set
@ -327,7 +327,7 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
~RHSKnownOne & DemandedMask); ~RHSKnownOne & DemandedMask);
Instruction *And = Instruction *And =
BinaryOperator::CreateAnd(I->getOperand(0), AndC, "tmp"); BinaryOperator::CreateAnd(I->getOperand(0), AndC, "tmp");
return InsertNewInstBefore(And, *I); return InsertNewInstWith(And, *I);
} }
} }
@ -353,13 +353,13 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
ConstantInt::get(I->getType(), NewMask & AndRHS->getValue()); ConstantInt::get(I->getType(), NewMask & AndRHS->getValue());
Instruction *NewAnd = Instruction *NewAnd =
BinaryOperator::CreateAnd(I->getOperand(0), AndC, "tmp"); BinaryOperator::CreateAnd(I->getOperand(0), AndC, "tmp");
InsertNewInstBefore(NewAnd, *I); InsertNewInstWith(NewAnd, *I);
Constant *XorC = Constant *XorC =
ConstantInt::get(I->getType(), NewMask & XorRHS->getValue()); ConstantInt::get(I->getType(), NewMask & XorRHS->getValue());
Instruction *NewXor = Instruction *NewXor =
BinaryOperator::CreateXor(NewAnd, XorC, "tmp"); BinaryOperator::CreateXor(NewAnd, XorC, "tmp");
return InsertNewInstBefore(NewXor, *I); return InsertNewInstWith(NewXor, *I);
} }
// Output known-0 bits are known if clear or set in both the LHS & RHS. // Output known-0 bits are known if clear or set in both the LHS & RHS.
@ -472,7 +472,7 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
if (KnownZero[SrcBitWidth-1] || (NewBits & ~DemandedMask) == NewBits) { if (KnownZero[SrcBitWidth-1] || (NewBits & ~DemandedMask) == NewBits) {
// Convert to ZExt cast // Convert to ZExt cast
CastInst *NewCast = new ZExtInst(I->getOperand(0), VTy, I->getName()); CastInst *NewCast = new ZExtInst(I->getOperand(0), VTy, I->getName());
return InsertNewInstBefore(NewCast, *I); return InsertNewInstWith(NewCast, *I);
} else if (KnownOne[SrcBitWidth-1]) { // Input sign bit known set } else if (KnownOne[SrcBitWidth-1]) { // Input sign bit known set
KnownOne |= NewBits; KnownOne |= NewBits;
} }
@ -515,7 +515,7 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
Instruction *Or = Instruction *Or =
BinaryOperator::CreateOr(I->getOperand(0), I->getOperand(1), BinaryOperator::CreateOr(I->getOperand(0), I->getOperand(1),
I->getName()); I->getName());
return InsertNewInstBefore(Or, *I); return InsertNewInstWith(Or, *I);
} }
// We can say something about the output known-zero and known-one bits, // We can say something about the output known-zero and known-one bits,
@ -632,7 +632,7 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
// Perform the logical shift right. // Perform the logical shift right.
Instruction *NewVal = BinaryOperator::CreateLShr( Instruction *NewVal = BinaryOperator::CreateLShr(
I->getOperand(0), I->getOperand(1), I->getName()); I->getOperand(0), I->getOperand(1), I->getName());
return InsertNewInstBefore(NewVal, *I); return InsertNewInstWith(NewVal, *I);
} }
// If the sign bit is the only bit demanded by this ashr, then there is no // If the sign bit is the only bit demanded by this ashr, then there is no
@ -676,7 +676,7 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
// Perform the logical shift right. // Perform the logical shift right.
Instruction *NewVal = BinaryOperator::CreateLShr( Instruction *NewVal = BinaryOperator::CreateLShr(
I->getOperand(0), SA, I->getName()); I->getOperand(0), SA, I->getName());
return InsertNewInstBefore(NewVal, *I); return InsertNewInstWith(NewVal, *I);
} else if ((KnownOne & SignBit) != 0) { // New bits are known one. } else if ((KnownOne & SignBit) != 0) { // New bits are known one.
KnownOne |= HighBits; KnownOne |= HighBits;
} }
@ -774,7 +774,7 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
NewVal = BinaryOperator::CreateShl(II->getArgOperand(0), NewVal = BinaryOperator::CreateShl(II->getArgOperand(0),
ConstantInt::get(I->getType(), ResultBit-InputBit)); ConstantInt::get(I->getType(), ResultBit-InputBit));
NewVal->takeName(I); NewVal->takeName(I);
return InsertNewInstBefore(NewVal, *I); return InsertNewInstWith(NewVal, *I);
} }
// TODO: Could compute known zero/one bits based on the input. // TODO: Could compute known zero/one bits based on the input.
@ -1108,21 +1108,21 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
Value *LHS = II->getArgOperand(0); Value *LHS = II->getArgOperand(0);
Value *RHS = II->getArgOperand(1); Value *RHS = II->getArgOperand(1);
// Extract the element as scalars. // Extract the element as scalars.
LHS = InsertNewInstBefore(ExtractElementInst::Create(LHS, LHS = InsertNewInstWith(ExtractElementInst::Create(LHS,
ConstantInt::get(Type::getInt32Ty(I->getContext()), 0U)), *II); ConstantInt::get(Type::getInt32Ty(I->getContext()), 0U)), *II);
RHS = InsertNewInstBefore(ExtractElementInst::Create(RHS, RHS = InsertNewInstWith(ExtractElementInst::Create(RHS,
ConstantInt::get(Type::getInt32Ty(I->getContext()), 0U)), *II); ConstantInt::get(Type::getInt32Ty(I->getContext()), 0U)), *II);
switch (II->getIntrinsicID()) { switch (II->getIntrinsicID()) {
default: llvm_unreachable("Case stmts out of sync!"); default: llvm_unreachable("Case stmts out of sync!");
case Intrinsic::x86_sse_sub_ss: case Intrinsic::x86_sse_sub_ss:
case Intrinsic::x86_sse2_sub_sd: case Intrinsic::x86_sse2_sub_sd:
TmpV = InsertNewInstBefore(BinaryOperator::CreateFSub(LHS, RHS, TmpV = InsertNewInstWith(BinaryOperator::CreateFSub(LHS, RHS,
II->getName()), *II); II->getName()), *II);
break; break;
case Intrinsic::x86_sse_mul_ss: case Intrinsic::x86_sse_mul_ss:
case Intrinsic::x86_sse2_mul_sd: case Intrinsic::x86_sse2_mul_sd:
TmpV = InsertNewInstBefore(BinaryOperator::CreateFMul(LHS, RHS, TmpV = InsertNewInstWith(BinaryOperator::CreateFMul(LHS, RHS,
II->getName()), *II); II->getName()), *II);
break; break;
} }
@ -1132,7 +1132,7 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
UndefValue::get(II->getType()), TmpV, UndefValue::get(II->getType()), TmpV,
ConstantInt::get(Type::getInt32Ty(I->getContext()), 0U, false), ConstantInt::get(Type::getInt32Ty(I->getContext()), 0U, false),
II->getName()); II->getName());
InsertNewInstBefore(New, *II); InsertNewInstWith(New, *II);
return New; return New;
} }
} }