replica
/
hanchenye-llvm-project
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Add Intel processors core i7 and atom. 

llvm-svn: 61603
This commit is contained in:
Evan Cheng 2009-01-03 04:24:44 +00:00
parent 9a3ec1b208
commit 6e100a62b1
2 changed files with 4 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
llvm/lib/Target/X86/X86.td
View File

@ -76,6 +76,8 @@ def : Proc<"prescott", [FeatureSSE3, FeatureSlowBTMem]>;
def : Proc<"nocona", [FeatureSSE3, Feature64Bit, FeatureSlowBTMem]>;
def : Proc<"core2", [FeatureSSSE3, Feature64Bit, FeatureSlowBTMem]>;
def : Proc<"penryn", [FeatureSSE41, Feature64Bit, FeatureSlowBTMem]>;
def : Proc<"atom", [FeatureSSE3, Feature64Bit, FeatureSlowBTMem]>;
def : Proc<"corei7", [FeatureSSE42, Feature64Bit, FeatureSlowBTMem]>;
def : Proc<"k6", [FeatureMMX]>;
def : Proc<"k6-2", [FeatureMMX, Feature3DNow]>;

3
llvm/lib/Target/X86/X86Subtarget.cpp
View File

@ -204,6 +204,7 @@ static const char *GetCurrentX86CPU() {
unsigned Family = 0;
unsigned Model = 0;
DetectFamilyModel(EAX, Family, Model);
bool HasSSE42 = (ECX >> 19) & 0x1;
X86::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
bool Em64T = (EDX >> 29) & 0x1;
@ -254,7 +255,7 @@ static const char *GetCurrentX86CPU() {
case 28:
// Intel Atom, and Core i7 both have this model.
// Atom has SSSE3, Core i7 has SSE4.2
return "core2";
return (HasSSE42) ? "corei7" : "atom";
default:
return (Em64T) ? "x86-64" : "pentium4";
}