The value produced is op1 * 2op2 mod 2n, where n is the width of the result. If op2 is (statically or dynamically) negative or -equal to or larger than the number of bits in op1, the result is undefined.
+equal to or larger than the number of bits in op1, the result is undefined. +If the arguments are vectors, each vector element of op1 is shifted by the +corresponding shift amount in op2.
<result> = shl i32 4, %var ; yields {i32}: 4 << %var
@@ -2616,7 +2618,9 @@ type. 'op2' is treated as an unsigned value.
This instruction always performs a logical shift right operation. The most
significant bits of the result will be filled with zero bits after the
shift. If op2 is (statically or dynamically) equal to or larger than
-the number of bits in op1, the result is undefined.
+the number of bits in op1, the result is undefined. If the arguments are
+vectors, each vector element of op1 is shifted by the corresponding shift
+amount in op2.
Example:
@@ -2651,8 +2655,9 @@ type. 'op2' is treated as an unsigned value.
This instruction always performs an arithmetic shift right operation,
The most significant bits of the result will be filled with the sign bit
of op1. If op2 is (statically or dynamically) equal to or
-larger than the number of bits in op1, the result is undefined.
-
+larger than the number of bits in op1, the result is undefined. If the
+arguments are vectors, each vector element of op1 is shifted by the
+corresponding shift amount in op2.
Example: