From 67dfd4236aefc2228b2873fad63bfd71acf75bda Mon Sep 17 00:00:00 2001 From: Nate Begeman Date: Mon, 14 Dec 2009 05:15:02 +0000 Subject: [PATCH] Revert mmx palignr to use an intrinsic, since mmx shuffle patterns are missing. llvm-svn: 91269 --- clang/include/clang/Basic/BuiltinsX86.def | 2 +- clang/lib/CodeGen/CGBuiltin.cpp | 5 ++++- clang/lib/Headers/tmmintrin.h | 2 +- clang/test/CodeGen/palignr.c | 4 ++++ 4 files changed, 10 insertions(+), 3 deletions(-) diff --git a/clang/include/clang/Basic/BuiltinsX86.def b/clang/include/clang/Basic/BuiltinsX86.def index adb1b7643f8e..6315c16dd80a 100644 --- a/clang/include/clang/Basic/BuiltinsX86.def +++ b/clang/include/clang/Basic/BuiltinsX86.def @@ -251,7 +251,7 @@ BUILTIN(__builtin_ia32_monitor, "vv*UiUi", "") BUILTIN(__builtin_ia32_mwait, "vUiUi", "") BUILTIN(__builtin_ia32_lddqu, "V16ccC*", "") BUILTIN(__builtin_ia32_palignr128, "V16cV16cV16cc", "") -BUILTIN(__builtin_ia32_palignr, "V8cV8cV8cc", "") +BUILTIN(__builtin_ia32_palignr, "V1LLiV1LLiV1LLic", "") BUILTIN(__builtin_ia32_insertps128, "V4fV4fV4fi", "") BUILTIN(__builtin_ia32_storelv4si, "vV2i*V2LLi", "") diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index 5d5caa2e9a7d..c70443245c76 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -805,8 +805,11 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, Ops[0] = Builder.CreateBitCast(Ops[0], PtrTy); return Builder.CreateStore(Ops[1], Ops[0]); } - case X86::BI__builtin_ia32_palignr128: case X86::BI__builtin_ia32_palignr: { + Function *F = CGM.getIntrinsic(Intrinsic::x86_ssse3_palign_r); + return Builder.CreateCall(F, &Ops[0], &Ops[0] + Ops.size()); + } + case X86::BI__builtin_ia32_palignr128: { unsigned shiftVal = cast(Ops[2])->getZExtValue(); // If palignr is shifting the pair of input vectors less than 17 bytes, diff --git a/clang/lib/Headers/tmmintrin.h b/clang/lib/Headers/tmmintrin.h index 374a27ecd77b..7adb776fef76 100644 --- a/clang/lib/Headers/tmmintrin.h +++ b/clang/lib/Headers/tmmintrin.h @@ -67,7 +67,7 @@ _mm_abs_epi32(__m128i a) } #define _mm_alignr_epi8(a, b, n) (__builtin_ia32_palignr128((a), (b), (n))) -#define _mm_alignr_pi8(a, b, n) (__builtin_ia32_palignr((a), (b), (n))) +#define _mm_alignr_pi8(a, b, n) (__builtin_ia32_palignr((a), (b), (n*8))) static inline __m128i __attribute__((__always_inline__, __nodebug__)) _mm_hadd_epi16(__m128i a, __m128i b) diff --git a/clang/test/CodeGen/palignr.c b/clang/test/CodeGen/palignr.c index c0c7e773841e..41e48bd2854d 100644 --- a/clang/test/CodeGen/palignr.c +++ b/clang/test/CodeGen/palignr.c @@ -1,8 +1,12 @@ // RUN: clang-cc %s -triple=i686-apple-darwin -target-feature +ssse3 -O1 -S -o - | FileCheck %s #define _mm_alignr_epi8(a, b, n) (__builtin_ia32_palignr128((a), (b), (n))) +#define _mm_alignr_pi8(a, b, n) (__builtin_ia32_palignr((a), (b), (n*8))) +typedef __attribute__((vector_size(8))) int int2; typedef __attribute__((vector_size(16))) int int4; +// CHECK: palignr +int2 mmx_align1(int2 a, int2 b) { return _mm_alignr_pi8(a, b, 7); } // CHECK: palignr int4 align1(int4 a, int4 b) { return _mm_alignr_epi8(a, b, 15); } // CHECK: ret