From 67cc246dcaabdf1516379e702a4e25acbf37b882 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Fri, 4 May 2018 15:20:18 +0000 Subject: [PATCH] [X86] Cleanup SchedWriteFMA classes and use X86SchedWriteWidths directly. Rename scalar and XMM versions, this is to match/simplify an upcoming change to split MUL/DIV/SQRT scalar/xmm/ymm/zmm classes. llvm-svn: 331531 --- llvm/lib/Target/X86/X86InstrAVX512.td | 10 +- llvm/lib/Target/X86/X86InstrFMA.td | 122 +++++++++---------- llvm/lib/Target/X86/X86SchedBroadwell.td | 2 +- llvm/lib/Target/X86/X86SchedHaswell.td | 4 +- llvm/lib/Target/X86/X86SchedSandyBridge.td | 4 +- llvm/lib/Target/X86/X86SchedSkylakeClient.td | 4 +- llvm/lib/Target/X86/X86SchedSkylakeServer.td | 4 +- llvm/lib/Target/X86/X86Schedule.td | 4 +- llvm/lib/Target/X86/X86ScheduleAtom.td | 2 +- llvm/lib/Target/X86/X86ScheduleBtVer2.td | 2 +- llvm/lib/Target/X86/X86ScheduleSLM.td | 2 +- llvm/lib/Target/X86/X86ScheduleZnver1.td | 2 +- 12 files changed, 80 insertions(+), 82 deletions(-) diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index c8a15cc457fa..dac3d490fedf 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -6430,29 +6430,29 @@ let Constraints = "$src1 = $dst", hasSideEffects = 0 in { defm r_Int: AVX512_maskable_3src_scalar, - AVX512FMA3Base, Sched<[WriteFMAS]>; + AVX512FMA3Base, Sched<[SchedWriteFMA.Scl]>; defm m_Int: AVX512_maskable_3src_scalar, - AVX512FMA3Base, Sched<[WriteFMASLd, ReadAfterLd]>; + AVX512FMA3Base, Sched<[SchedWriteFMA.Scl.Folded, ReadAfterLd]>; defm rb_Int: AVX512_maskable_3src_scalar, - AVX512FMA3Base, EVEX_B, EVEX_RC, Sched<[WriteFMAS]>; + AVX512FMA3Base, EVEX_B, EVEX_RC, Sched<[SchedWriteFMA.Scl]>; let isCodeGenOnly = 1, isCommutable = 1 in { def r : AVX512FMA3S, Sched<[WriteFMAS]>; + !if(MaskOnlyReg, [], [RHS_r])>, Sched<[SchedWriteFMA.Scl]>; def m : AVX512FMA3S, Sched<[WriteFMASLd, ReadAfterLd]>; + [RHS_m]>, Sched<[SchedWriteFMA.Scl.Folded, ReadAfterLd]>; }// isCodeGenOnly = 1 }// Constraints = "$src1 = $dst" } diff --git a/llvm/lib/Target/X86/X86InstrFMA.td b/llvm/lib/Target/X86/X86InstrFMA.td index e3b44c9883dd..c979f6cbc563 100644 --- a/llvm/lib/Target/X86/X86InstrFMA.td +++ b/llvm/lib/Target/X86/X86InstrFMA.td @@ -101,23 +101,22 @@ multiclass fma3p_forms opc132, bits<8> opc213, bits<8> opc231, string OpcodeStr, string PackTy, string Suff, PatFrag MemFrag128, PatFrag MemFrag256, SDNode Op, ValueType OpTy128, ValueType OpTy256, - X86FoldableSchedWrite sched128, - X86FoldableSchedWrite sched256> { + X86SchedWriteWidths sched> { defm NAME#213#Suff : fma3p_rm_213; + VR128, OpTy128, f128mem, MemFrag128, Op, sched.XMM>; defm NAME#231#Suff : fma3p_rm_231; + VR128, OpTy128, f128mem, MemFrag128, Op, sched.XMM>; defm NAME#132#Suff : fma3p_rm_132; + VR128, OpTy128, f128mem, MemFrag128, Op, sched.XMM>; defm NAME#213#Suff#Y : fma3p_rm_213, + VR256, OpTy256, f256mem, MemFrag256, Op, sched.YMM>, VEX_L; defm NAME#231#Suff#Y : fma3p_rm_231, + VR256, OpTy256, f256mem, MemFrag256, Op, sched.YMM>, VEX_L; defm NAME#132#Suff#Y : fma3p_rm_132, + VR256, OpTy256, f256mem, MemFrag256, Op, sched.YMM>, VEX_L; } @@ -125,45 +124,45 @@ multiclass fma3p_forms opc132, bits<8> opc213, bits<8> opc231, let ExeDomain = SSEPackedSingle in { defm VFMADD : fma3p_forms<0x98, 0xA8, 0xB8, "vfmadd", "ps", "PS", loadv4f32, loadv8f32, X86Fmadd, v4f32, v8f32, - WriteFMA, WriteFMAY>; + SchedWriteFMA>; defm VFMSUB : fma3p_forms<0x9A, 0xAA, 0xBA, "vfmsub", "ps", "PS", loadv4f32, loadv8f32, X86Fmsub, v4f32, v8f32, - WriteFMA, WriteFMAY>; + SchedWriteFMA>; defm VFMADDSUB : fma3p_forms<0x96, 0xA6, 0xB6, "vfmaddsub", "ps", "PS", loadv4f32, loadv8f32, X86Fmaddsub, v4f32, v8f32, - WriteFMA, WriteFMAY>; + SchedWriteFMA>; defm VFMSUBADD : fma3p_forms<0x97, 0xA7, 0xB7, "vfmsubadd", "ps", "PS", loadv4f32, loadv8f32, X86Fmsubadd, v4f32, v8f32, - WriteFMA, WriteFMAY>; + SchedWriteFMA>; } let ExeDomain = SSEPackedDouble in { defm VFMADD : fma3p_forms<0x98, 0xA8, 0xB8, "vfmadd", "pd", "PD", loadv2f64, loadv4f64, X86Fmadd, v2f64, - v4f64, WriteFMA, WriteFMAY>, VEX_W; + v4f64, SchedWriteFMA>, VEX_W; defm VFMSUB : fma3p_forms<0x9A, 0xAA, 0xBA, "vfmsub", "pd", "PD", loadv2f64, loadv4f64, X86Fmsub, v2f64, - v4f64, WriteFMA, WriteFMAY>, VEX_W; + v4f64, SchedWriteFMA>, VEX_W; defm VFMADDSUB : fma3p_forms<0x96, 0xA6, 0xB6, "vfmaddsub", "pd", "PD", loadv2f64, loadv4f64, X86Fmaddsub, - v2f64, v4f64, WriteFMA, WriteFMAY>, VEX_W; + v2f64, v4f64, SchedWriteFMA>, VEX_W; defm VFMSUBADD : fma3p_forms<0x97, 0xA7, 0xB7, "vfmsubadd", "pd", "PD", loadv2f64, loadv4f64, X86Fmsubadd, - v2f64, v4f64, WriteFMA, WriteFMAY>, VEX_W; + v2f64, v4f64, SchedWriteFMA>, VEX_W; } // Fused Negative Multiply-Add let ExeDomain = SSEPackedSingle in { defm VFNMADD : fma3p_forms<0x9C, 0xAC, 0xBC, "vfnmadd", "ps", "PS", loadv4f32, - loadv8f32, X86Fnmadd, v4f32, v8f32, WriteFMA, WriteFMAY>; + loadv8f32, X86Fnmadd, v4f32, v8f32, SchedWriteFMA>; defm VFNMSUB : fma3p_forms<0x9E, 0xAE, 0xBE, "vfnmsub", "ps", "PS", loadv4f32, - loadv8f32, X86Fnmsub, v4f32, v8f32, WriteFMA, WriteFMAY>; + loadv8f32, X86Fnmsub, v4f32, v8f32, SchedWriteFMA>; } let ExeDomain = SSEPackedDouble in { defm VFNMADD : fma3p_forms<0x9C, 0xAC, 0xBC, "vfnmadd", "pd", "PD", loadv2f64, - loadv4f64, X86Fnmadd, v2f64, v4f64, WriteFMA, WriteFMAY>, VEX_W; + loadv4f64, X86Fnmadd, v2f64, v4f64, SchedWriteFMA>, VEX_W; defm VFNMSUB : fma3p_forms<0x9E, 0xAE, 0xBE, "vfnmsub", "pd", "PD", loadv2f64, - loadv4f64, X86Fnmsub, v2f64, v4f64, WriteFMA, WriteFMAY>, VEX_W; + loadv4f64, X86Fnmsub, v2f64, v4f64, SchedWriteFMA>, VEX_W; } // All source register operands of FMA opcodes defined in fma3s_rm multiclass @@ -356,14 +355,14 @@ multiclass fma3s opc132, bits<8> opc213, bits<8> opc231, } defm VFMADD : fma3s<0x99, 0xA9, 0xB9, "vfmadd", X86Fmadds1, X86Fmadd, - WriteFMAS>, VEX_LIG; + SchedWriteFMA.Scl>, VEX_LIG; defm VFMSUB : fma3s<0x9B, 0xAB, 0xBB, "vfmsub", X86Fmsubs1, X86Fmsub, - WriteFMAS>, VEX_LIG; + SchedWriteFMA.Scl>, VEX_LIG; defm VFNMADD : fma3s<0x9D, 0xAD, 0xBD, "vfnmadd", X86Fnmadds1, X86Fnmadd, - WriteFMAS>, VEX_LIG; + SchedWriteFMA.Scl>, VEX_LIG; defm VFNMSUB : fma3s<0x9F, 0xAF, 0xBF, "vfnmsub", X86Fnmsubs1, X86Fnmsub, - WriteFMAS>, VEX_LIG; + SchedWriteFMA.Scl>, VEX_LIG; //===----------------------------------------------------------------------===// // FMA4 - AMD 4 operand Fused Multiply-Add instructions @@ -450,8 +449,7 @@ let hasSideEffects = 0 in multiclass fma4p opc, string OpcodeStr, SDNode OpNode, ValueType OpVT128, ValueType OpVT256, PatFrag ld_frag128, PatFrag ld_frag256, - X86FoldableSchedWrite sched128, - X86FoldableSchedWrite sched256> { + X86SchedWriteWidths sched> { let isCommutable = 1 in def rr : FMA4 opc, string OpcodeStr, SDNode OpNode, "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"), [(set VR128:$dst, (OpVT128 (OpNode VR128:$src1, VR128:$src2, VR128:$src3)))]>, - VEX_W, Sched<[sched128]>; + VEX_W, Sched<[sched.XMM]>; def rm : FMA4, VEX_W, - Sched<[sched128.Folded, ReadAfterLd, ReadAfterLd]>; + Sched<[sched.XMM.Folded, ReadAfterLd, ReadAfterLd]>; def mr : FMA4, - Sched<[sched128.Folded, ReadAfterLd, + Sched<[sched.XMM.Folded, ReadAfterLd, // f128mem:$src2 ReadDefault, ReadDefault, ReadDefault, ReadDefault, ReadDefault, @@ -486,21 +484,21 @@ multiclass fma4p opc, string OpcodeStr, SDNode OpNode, "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"), [(set VR256:$dst, (OpVT256 (OpNode VR256:$src1, VR256:$src2, VR256:$src3)))]>, - VEX_W, VEX_L, Sched<[sched256]>; + VEX_W, VEX_L, Sched<[sched.YMM]>; def Yrm : FMA4, VEX_W, VEX_L, - Sched<[sched256.Folded, ReadAfterLd, ReadAfterLd]>; + Sched<[sched.YMM.Folded, ReadAfterLd, ReadAfterLd]>; def Ymr : FMA4, VEX_L, - Sched<[sched256.Folded, ReadAfterLd, + Sched<[sched.YMM.Folded, ReadAfterLd, // f256mem:$src2 ReadDefault, ReadDefault, ReadDefault, ReadDefault, ReadDefault, @@ -512,78 +510,78 @@ let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in { (ins VR128:$src1, VR128:$src2, VR128:$src3), !strconcat(OpcodeStr, "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"), []>, - Sched<[sched128]>, FoldGenData; + Sched<[sched.XMM]>, FoldGenData; def Yrr_REV : FMA4, - VEX_L, Sched<[sched256]>, FoldGenData; + VEX_L, Sched<[sched.YMM]>, FoldGenData; } // isCodeGenOnly = 1 } let ExeDomain = SSEPackedSingle in { // Scalar Instructions defm VFMADDSS4 : fma4s<0x6A, "vfmaddss", FR32, f32mem, f32, X86Fmadd, loadf32, - WriteFMAS>, + SchedWriteFMA.Scl>, fma4s_int<0x6A, "vfmaddss", ssmem, v4f32, sse_load_f32, - X86Fmadd4s, WriteFMAS>; + X86Fmadd4s, SchedWriteFMA.Scl>; defm VFMSUBSS4 : fma4s<0x6E, "vfmsubss", FR32, f32mem, f32, X86Fmsub, loadf32, - WriteFMAS>, + SchedWriteFMA.Scl>, fma4s_int<0x6E, "vfmsubss", ssmem, v4f32, sse_load_f32, - X86Fmsub4s, WriteFMAS>; + X86Fmsub4s, SchedWriteFMA.Scl>; defm VFNMADDSS4 : fma4s<0x7A, "vfnmaddss", FR32, f32mem, f32, - X86Fnmadd, loadf32, WriteFMAS>, + X86Fnmadd, loadf32, SchedWriteFMA.Scl>, fma4s_int<0x7A, "vfnmaddss", ssmem, v4f32, sse_load_f32, - X86Fnmadd4s, WriteFMAS>; + X86Fnmadd4s, SchedWriteFMA.Scl>; defm VFNMSUBSS4 : fma4s<0x7E, "vfnmsubss", FR32, f32mem, f32, - X86Fnmsub, loadf32, WriteFMAS>, + X86Fnmsub, loadf32, SchedWriteFMA.Scl>, fma4s_int<0x7E, "vfnmsubss", ssmem, v4f32, sse_load_f32, - X86Fnmsub4s, WriteFMAS>; + X86Fnmsub4s, SchedWriteFMA.Scl>; // Packed Instructions defm VFMADDPS4 : fma4p<0x68, "vfmaddps", X86Fmadd, v4f32, v8f32, - loadv4f32, loadv8f32, WriteFMA, WriteFMAY>; + loadv4f32, loadv8f32, SchedWriteFMA>; defm VFMSUBPS4 : fma4p<0x6C, "vfmsubps", X86Fmsub, v4f32, v8f32, - loadv4f32, loadv8f32, WriteFMA, WriteFMAY>; + loadv4f32, loadv8f32, SchedWriteFMA>; defm VFNMADDPS4 : fma4p<0x78, "vfnmaddps", X86Fnmadd, v4f32, v8f32, - loadv4f32, loadv8f32, WriteFMA, WriteFMAY>; + loadv4f32, loadv8f32, SchedWriteFMA>; defm VFNMSUBPS4 : fma4p<0x7C, "vfnmsubps", X86Fnmsub, v4f32, v8f32, - loadv4f32, loadv8f32, WriteFMA, WriteFMAY>; + loadv4f32, loadv8f32, SchedWriteFMA>; defm VFMADDSUBPS4 : fma4p<0x5C, "vfmaddsubps", X86Fmaddsub, v4f32, v8f32, - loadv4f32, loadv8f32, WriteFMA, WriteFMAY>; + loadv4f32, loadv8f32, SchedWriteFMA>; defm VFMSUBADDPS4 : fma4p<0x5E, "vfmsubaddps", X86Fmsubadd, v4f32, v8f32, - loadv4f32, loadv8f32, WriteFMA, WriteFMAY>; + loadv4f32, loadv8f32, SchedWriteFMA>; } let ExeDomain = SSEPackedDouble in { // Scalar Instructions defm VFMADDSD4 : fma4s<0x6B, "vfmaddsd", FR64, f64mem, f64, X86Fmadd, loadf64, - WriteFMAS>, + SchedWriteFMA.Scl>, fma4s_int<0x6B, "vfmaddsd", sdmem, v2f64, sse_load_f64, - X86Fmadd4s, WriteFMAS>; + X86Fmadd4s, SchedWriteFMA.Scl>; defm VFMSUBSD4 : fma4s<0x6F, "vfmsubsd", FR64, f64mem, f64, X86Fmsub, loadf64, - WriteFMAS>, + SchedWriteFMA.Scl>, fma4s_int<0x6F, "vfmsubsd", sdmem, v2f64, sse_load_f64, - X86Fmsub4s, WriteFMAS>; + X86Fmsub4s, SchedWriteFMA.Scl>; defm VFNMADDSD4 : fma4s<0x7B, "vfnmaddsd", FR64, f64mem, f64, - X86Fnmadd, loadf64, WriteFMAS>, + X86Fnmadd, loadf64, SchedWriteFMA.Scl>, fma4s_int<0x7B, "vfnmaddsd", sdmem, v2f64, sse_load_f64, - X86Fnmadd4s, WriteFMAS>; + X86Fnmadd4s, SchedWriteFMA.Scl>; defm VFNMSUBSD4 : fma4s<0x7F, "vfnmsubsd", FR64, f64mem, f64, - X86Fnmsub, loadf64, WriteFMAS>, + X86Fnmsub, loadf64, SchedWriteFMA.Scl>, fma4s_int<0x7F, "vfnmsubsd", sdmem, v2f64, sse_load_f64, - X86Fnmsub4s, WriteFMAS>; + X86Fnmsub4s, SchedWriteFMA.Scl>; // Packed Instructions defm VFMADDPD4 : fma4p<0x69, "vfmaddpd", X86Fmadd, v2f64, v4f64, - loadv2f64, loadv4f64, WriteFMA, WriteFMAY>; + loadv2f64, loadv4f64, SchedWriteFMA>; defm VFMSUBPD4 : fma4p<0x6D, "vfmsubpd", X86Fmsub, v2f64, v4f64, - loadv2f64, loadv4f64, WriteFMA, WriteFMAY>; + loadv2f64, loadv4f64, SchedWriteFMA>; defm VFNMADDPD4 : fma4p<0x79, "vfnmaddpd", X86Fnmadd, v2f64, v4f64, - loadv2f64, loadv4f64, WriteFMA, WriteFMAY>; + loadv2f64, loadv4f64, SchedWriteFMA>; defm VFNMSUBPD4 : fma4p<0x7D, "vfnmsubpd", X86Fnmsub, v2f64, v4f64, - loadv2f64, loadv4f64, WriteFMA, WriteFMAY>; + loadv2f64, loadv4f64, SchedWriteFMA>; defm VFMADDSUBPD4 : fma4p<0x5D, "vfmaddsubpd", X86Fmaddsub, v2f64, v4f64, - loadv2f64, loadv4f64, WriteFMA, WriteFMAY>; + loadv2f64, loadv4f64, SchedWriteFMA>; defm VFMSUBADDPD4 : fma4p<0x5F, "vfmsubaddpd", X86Fmsubadd, v2f64, v4f64, - loadv2f64, loadv4f64, WriteFMA, WriteFMAY>; + loadv2f64, loadv4f64, SchedWriteFMA>; } diff --git a/llvm/lib/Target/X86/X86SchedBroadwell.td b/llvm/lib/Target/X86/X86SchedBroadwell.td index 5aac5957b228..09fb08064db7 100755 --- a/llvm/lib/Target/X86/X86SchedBroadwell.td +++ b/llvm/lib/Target/X86/X86SchedBroadwell.td @@ -171,7 +171,7 @@ defm : BWWriteResPair; // Floating point defm : BWWriteResPair; // Floating point reciprocal square root estimate. defm : BWWriteResPair; // Floating point reciprocal square root estimate (YMM/ZMM). defm : BWWriteResPair; // Fused Multiply Add. -defm : BWWriteResPair; // Fused Multiply Add (Scalar). +defm : BWWriteResPair; // Fused Multiply Add (XMM). defm : BWWriteResPair; // Fused Multiply Add (YMM/ZMM). defm : BWWriteResPair; // Floating point double dot product. defm : BWWriteResPair; // Floating point single dot product. diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td index 79a8f9ee1e95..748f3c7ceb2e 100644 --- a/llvm/lib/Target/X86/X86SchedHaswell.td +++ b/llvm/lib/Target/X86/X86SchedHaswell.td @@ -166,8 +166,8 @@ defm : HWWriteResPair; defm : HWWriteResPair; defm : HWWriteResPair; defm : HWWriteResPair; -defm : HWWriteResPair; -defm : HWWriteResPair; +defm : HWWriteResPair; +defm : HWWriteResPair; defm : HWWriteResPair; defm : HWWriteResPair; defm : HWWriteResPair; diff --git a/llvm/lib/Target/X86/X86SchedSandyBridge.td b/llvm/lib/Target/X86/X86SchedSandyBridge.td index fe8de4488728..014fc5013eb9 100644 --- a/llvm/lib/Target/X86/X86SchedSandyBridge.td +++ b/llvm/lib/Target/X86/X86SchedSandyBridge.td @@ -350,8 +350,8 @@ defm : SBWriteResPair; defm : SBWriteResPair; defm : SBWriteResPair; defm : SBWriteResPair; -defm : SBWriteResPair; -defm : SBWriteResPair; +defm : SBWriteResPair; +defm : SBWriteResPair; defm : SBWriteResPair; // Remaining SNB instrs. diff --git a/llvm/lib/Target/X86/X86SchedSkylakeClient.td b/llvm/lib/Target/X86/X86SchedSkylakeClient.td index 36675a060e31..70d0e5f38c10 100644 --- a/llvm/lib/Target/X86/X86SchedSkylakeClient.td +++ b/llvm/lib/Target/X86/X86SchedSkylakeClient.td @@ -166,8 +166,8 @@ defm : SKLWriteResPair; // Floating point defm : SKLWriteResPair; // Floating point reciprocal estimate (YMM/ZMM). defm : SKLWriteResPair; // Floating point reciprocal square root estimate. defm : SKLWriteResPair; // Floating point reciprocal square root estimate (YMM/ZMM). -defm : SKLWriteResPair; // Fused Multiply Add. -defm : SKLWriteResPair; // Fused Multiply Add (Scalar). +defm : SKLWriteResPair; // Fused Multiply Add. +defm : SKLWriteResPair; // Fused Multiply Add (XMM). defm : SKLWriteResPair; // Fused Multiply Add (YMM/ZMM). defm : SKLWriteResPair; // Floating point double dot product. defm : SKLWriteResPair; // Floating point single dot product. diff --git a/llvm/lib/Target/X86/X86SchedSkylakeServer.td b/llvm/lib/Target/X86/X86SchedSkylakeServer.td index 7ab6d4f09525..346cb3e92c48 100755 --- a/llvm/lib/Target/X86/X86SchedSkylakeServer.td +++ b/llvm/lib/Target/X86/X86SchedSkylakeServer.td @@ -166,8 +166,8 @@ defm : SKXWriteResPair; // Floating poin defm : SKXWriteResPair; // Floating point reciprocal estimate (YMM/ZMM). defm : SKXWriteResPair; // Floating point reciprocal square root estimate. defm : SKXWriteResPair; // Floating point reciprocal square root estimate (YMM/ZMM). -defm : SKXWriteResPair; // Fused Multiply Add. -defm : SKXWriteResPair; // Fused Multiply Add (Scalar). +defm : SKXWriteResPair; // Fused Multiply Add. +defm : SKXWriteResPair; // Fused Multiply Add (XMM). defm : SKXWriteResPair; // Fused Multiply Add (YMM/ZMM). defm : SKXWriteResPair; // Floating point double dot product. defm : SKXWriteResPair; // Floating point single dot product. diff --git a/llvm/lib/Target/X86/X86Schedule.td b/llvm/lib/Target/X86/X86Schedule.td index c3bea9c048c5..b2f0cb09c6e5 100644 --- a/llvm/lib/Target/X86/X86Schedule.td +++ b/llvm/lib/Target/X86/X86Schedule.td @@ -117,7 +117,7 @@ defm WriteFRcpY : X86SchedWritePair; // Floating point reciprocal estimate (YMM defm WriteFRsqrt : X86SchedWritePair; // Floating point reciprocal square root estimate. defm WriteFRsqrtY: X86SchedWritePair; // Floating point reciprocal square root estimate (YMM/ZMM). defm WriteFMA : X86SchedWritePair; // Fused Multiply Add. -defm WriteFMAS : X86SchedWritePair; // Fused Multiply Add (Scalar). +defm WriteFMAX : X86SchedWritePair; // Fused Multiply Add (XMM). defm WriteFMAY : X86SchedWritePair; // Fused Multiply Add (YMM/ZMM). defm WriteDPPD : X86SchedWritePair; // Floating point double dot product. defm WriteDPPS : X86SchedWritePair; // Floating point single dot product. @@ -248,7 +248,7 @@ def SchedWriteFCmp def SchedWriteFMul : X86SchedWriteWidths; def SchedWriteFMA - : X86SchedWriteWidths; + : X86SchedWriteWidths; def SchedWriteDPPD : X86SchedWriteWidths; def SchedWriteDPPS diff --git a/llvm/lib/Target/X86/X86ScheduleAtom.td b/llvm/lib/Target/X86/X86ScheduleAtom.td index 6c175d065192..b96c76ad93e4 100644 --- a/llvm/lib/Target/X86/X86ScheduleAtom.td +++ b/llvm/lib/Target/X86/X86ScheduleAtom.td @@ -227,7 +227,7 @@ defm : AtomWriteResPair; // NOTE defm : AtomWriteResPair; // NOTE: Doesn't exist on Atom. defm : AtomWriteResPair; // NOTE: Doesn't exist on Atom. defm : AtomWriteResPair; // NOTE: Doesn't exist on Atom. -defm : AtomWriteResPair; // NOTE: Doesn't exist on Atom. +defm : AtomWriteResPair; // NOTE: Doesn't exist on Atom. defm : AtomWriteResPair; // NOTE: Doesn't exist on Atom. defm : AtomWriteResPair; // NOTE: Doesn't exist on Atom. defm : AtomWriteResPair; // NOTE: Doesn't exist on Atom. diff --git a/llvm/lib/Target/X86/X86ScheduleBtVer2.td b/llvm/lib/Target/X86/X86ScheduleBtVer2.td index 2f11ead4d8ed..3f99f4ae5039 100644 --- a/llvm/lib/Target/X86/X86ScheduleBtVer2.td +++ b/llvm/lib/Target/X86/X86ScheduleBtVer2.td @@ -323,7 +323,7 @@ defm : JWriteResFpuPair; defm : JWriteResFpuPair; defm : JWriteResYMMPair; defm : JWriteResFpuPair; // NOTE: Doesn't exist on Jaguar. -defm : JWriteResFpuPair; // NOTE: Doesn't exist on Jaguar. +defm : JWriteResFpuPair; // NOTE: Doesn't exist on Jaguar. defm : JWriteResFpuPair; // NOTE: Doesn't exist on Jaguar. defm : JWriteResFpuPair; defm : JWriteResFpuPair; diff --git a/llvm/lib/Target/X86/X86ScheduleSLM.td b/llvm/lib/Target/X86/X86ScheduleSLM.td index 300427df6f87..6f96191caf01 100644 --- a/llvm/lib/Target/X86/X86ScheduleSLM.td +++ b/llvm/lib/Target/X86/X86ScheduleSLM.td @@ -318,7 +318,7 @@ defm : SLMWriteResPair; defm : SLMWriteResPair; defm : SLMWriteResPair; defm : SLMWriteResPair; -defm : SLMWriteResPair; +defm : SLMWriteResPair; defm : SLMWriteResPair; // Instruction overrides diff --git a/llvm/lib/Target/X86/X86ScheduleZnver1.td b/llvm/lib/Target/X86/X86ScheduleZnver1.td index fd863a1c1a73..550501701ce7 100644 --- a/llvm/lib/Target/X86/X86ScheduleZnver1.td +++ b/llvm/lib/Target/X86/X86ScheduleZnver1.td @@ -220,7 +220,7 @@ defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; -defm : ZnWriteResFpuPair; +defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair;