Realize that we don't support fmod directly, fixing CodeGen/Generic/print-arith-fp.ll
llvm-svn: 21939
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74905e0fb5
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@ -64,13 +64,15 @@ namespace {
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setOperationAction(ISD::SREM, MVT::i32, Expand);
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setOperationAction(ISD::UREM, MVT::i32, Expand);
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// We don't support sin/cos/sqrt
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// We don't support sin/cos/sqrt/fmod
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setOperationAction(ISD::FSIN , MVT::f64, Expand);
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setOperationAction(ISD::FCOS , MVT::f64, Expand);
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setOperationAction(ISD::FSQRT, MVT::f64, Expand);
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setOperationAction(ISD::SREM , MVT::f64, Expand);
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setOperationAction(ISD::FSIN , MVT::f32, Expand);
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setOperationAction(ISD::FCOS , MVT::f32, Expand);
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setOperationAction(ISD::FSQRT, MVT::f32, Expand);
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setOperationAction(ISD::SREM , MVT::f32, Expand);
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//PowerPC does not have CTPOP or CTTZ
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setOperationAction(ISD::CTPOP, MVT::i32 , Expand);
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@ -55,13 +55,15 @@ namespace {
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setOperationAction(ISD::MEMSET, MVT::Other, Expand);
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setOperationAction(ISD::MEMCPY, MVT::Other, Expand);
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// We don't support sin/cos/sqrt
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// We don't support sin/cos/sqrt/fmod
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setOperationAction(ISD::FSIN , MVT::f64, Expand);
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setOperationAction(ISD::FCOS , MVT::f64, Expand);
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setOperationAction(ISD::FSQRT, MVT::f64, Expand);
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setOperationAction(ISD::SREM , MVT::f64, Expand);
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setOperationAction(ISD::FSIN , MVT::f32, Expand);
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setOperationAction(ISD::FCOS , MVT::f32, Expand);
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setOperationAction(ISD::FSQRT, MVT::f32, Expand);
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setOperationAction(ISD::SREM , MVT::f32, Expand);
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// PPC 64 has i16 and i32 but no i8 (or i1) SEXTLOAD
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setOperationAction(ISD::SEXTLOAD, MVT::i1, Expand);
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